EE-612: Lecture 22: CMOS Process Steps Mark Lundstrom Electrical - PowerPoint PPT Presentation

EE-612: Lecture 22: CMOS Process Steps Mark Lundstrom Electrical and Computer Engineering Purdue University West Lafayette, IN USA Fall 2006 NCN www.nanohub.org Lundstrom EE-612 F06 1

outline 1) Unit Process Operations 2) Process Variations Lundstrom EE-612 F06 2

unit process operations 1) Oxidation 2) Diffusion 3) Ion Implantation 4) RTA/RTP 5) Chemical Vapor Deposition 6) Lithography 7) Etching 8) Metalization 9) Well Structures 10) Isolation 11) Source / Drain structures Lundstrom EE-612 F06 3

useful references 1) J.D. Plummer, M.D. Deal, P.B. Griffin, Silicon VLSI Technology, Fundamentals, Practice, and Modeling , Prentice Hall, Upper Saddle River, NJ, 2000. 2) S.A. Campbell, The Science and Engineering of Microelectronic Fabrication , 2nd Ed., Oxford Univ. Press, New York, 2001. Lundstrom EE-612 F06 4

oxidation Si + O 2 → SiO 2 ( dry ) Si+ H 2 O → SiO 2 ( wet ) wafers heater O 2 or H 2 O +carrier gas fused quartz T = 800 - 1100 o C furnace tube Lundstrom EE-612 F06 5

oxidation and doping C phophorous m > 1 boron m < 1 x m = C Si C SiO 2 Lundstrom EE-612 F06 6

7 local oxidation Lundstrom EE-612 F06 SiO 2 Si 3 N 4 Si

local oxidation (LOCOS) Si 3 N 4 ‘field oxide’ SiO 2 Si 'bird's beak' Lundstrom EE-612 F06 8

constant source diffusion ( ) C ( x ) = C S erfc x / 2 Dt C ∞ ( ) ∫ C S Q = dx = 2 C S Dt π C x , t 0 dopant-containing gas (e.g. POCl 3 ) time x Lundstrom EE-612 F06 9

⎤ ⎥ ⎦ 2 ) 10 ) exp − x / 2 Dt x ( ⎡ ⎢ ⎣ Limited source diffusion π Dt time Lundstrom EE-612 F06 ) = Q / ( C x , t ( C S C ‘predep’ t = 0

diffusion Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si substitutional interstitialcy interstitial D ( T ) = D 0 e − E A / k B T “oxidation enhanced diffusion’ Lundstrom EE-612 F06 11

ion implantation energetic ions bombard silicon wafer magnet acceleration • B wafer deflection � r F = Q r υ × B I ion source Lundstrom EE-612 F06 12

ion implantation Si R P ( E ) Δ R P ( E ) ( ) 2 2 Δ R p ( ) = N p exp − x − R p ⎡ ⎤ Q = 2 π N p Δ R p 2 N x ⎣ ⎦ implant damage (anneal) Lundstrom EE-612 F06 13

ion implantation (ii) 1.0 B ) m μ ( e g As n a 0.1 r d e t c e j o r P 0.01 10 100 1000 Acceleration energy (keV) Lundstrom EE-612 F06 14

15 x channeling Lundstrom EE-612 F06 tilted 3 deg Δ R P R P ( ) C x

rapid thermal annealing lamps thermal budget reflector Dt quartz window wafer gas inlet Lundstrom EE-612 F06 16

chemical vapor deposition reaction chamber Dt gas inlet wafer susceptor gas exhaust 2SiH 4 + 4NH 3 → Si 3 N 4 + 12H 2 silicon nitride SiH 4 → Si+2H 2 poly silicon SiH 4 +O 2 → SiO 2 +2H 2 silicon dioxide Lundstrom EE-612 F06 17

plasma CVD / etching RF power in gas inlet heater wafer gas exhaust lower temperature reduces thermal budget Dt Lundstrom EE-612 F06 18

lithography optical source wavelength, λ lens shutter contact or mask proximity resist wafer expose, develop, etch Lundstrom EE-612 F06 19

projection printing α UV source lens 1 mask lens 2 wafer Lundstrom EE-612 F06 20

21 E E E E E run out registration errors E E Lundstrom EE-612 F06 E E misalignment E E

phase shift lithography conventional mask phase shift mask electric field at mask electric field at mask intensity at wafer intensity at wafer Lundstrom EE-612 F06 22

pattern transfer negative resist ( less soluble after exposure) wafer wafer positive resist ( more soluble after exposure) resist: optically sensitive polymer which, wafer when exposed to UV changes its solubility in specific chemicals Lundstrom EE-612 F06 23

etching wet chemical etching dry etching (plasma or reactive ion etching - RIE) (isotropic) (anisotropic) wafer wafer undercut ionized gases react chemicals react with with underlying underlying material, material, but not but not resist resist Lundstrom EE-612 F06 24

pattern transfer (ii) L Drawn mask chrome lithography bias resist etch bias L Gate (physical) Lundstrom EE-612 F06 25

metalization Tungsten (W) plugs for first layer metal dep CMP www.itrs.net 2005 Edition Lundstrom EE-612 F06 26

27 1) Unit Process Operations Lundstrom EE-612 F06 2) Process Variations outline

discrete doping effects V = W × L × x j example: L = 50 nm W = 100 nm N+ N+ x j = 25 nm N A = 10 18 cm -3 N TOT = 125 P (N A cm -3 ) Number of dopants in the critical volume is a statistical quantity Lundstrom EE-612 F06 28

discrete doping effects (ii) source drain Effects: 1) σ VT (10’s of mV) 2) lower avg. V T (10’s of mV) 3) asymmetry in I D 3D transport leads to inhomogeneous conduction (see Wong and Taur, IEDM, 1993, p. 705) Lundstrom EE-612 F06 29

discrete doping effects (iii) 35 nm MOSFET (simulations from A. Asenov group, AFM measurements, Fujitsu Univ. of Glasgow) Lundstrom EE-612 F06 30

statistical variability Line edge roughness discrete dopants From A. Asenov, Univ. of Glasgow Lundstrom EE-612 F06 31

variability is becoming a major issue G. Declerck, Keynote talk, VLSI Technol. Symp. 2005 Lundstrom EE-612 F06 32

outline 1) Unit Process Operations 2) Process Variations For a basic, CMOS process flow for an STI (shallow trench isolation process), see: http://www.rit.edu/~lffeee/AdvCmos2003.pdf Lundstrom EE-612 F06 33

CMOS process flow For a basic, CMOS process flow for an STI (shallow trench isolation process), see: http://www.rit.edu/~lffeee/AdvCmos2003.pdf The author is indebted to Dr. Lynn Fuller of Rochester Institute of Technology for making these materials available. What follows is a condensed version of a more complete presentation by Dr. Fuller. I regret any errors that I may have introduced by shortening these materials. -Mark Lundstrom 10/19/06 Lundstrom EE-612 F06 34