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Switched-Capacitor Circuits Jrgen Andreas Michaelsen Spring 2014 - PowerPoint PPT Presentation

INF4420 Switched-Capacitor Circuits Jrgen Andreas Michaelsen Spring 2014 Outline Introduction (why and how) Integrators and filters Gain circuits Noise and charge injection Spring 2014 Switched-Capacitor Circuits 2


  1. INF4420 Switched-Capacitor Circuits Jørgen Andreas Michaelsen Spring 2014

  2. Outline • Introduction (why and how) • Integrators and filters • Gain circuits • Noise and charge injection Spring 2014 Switched-Capacitor Circuits 2

  3. Introduction Discrete time analog signal processing Why? Spring 2014 Switched-Capacitor Circuits 3

  4. Introduction The arrangement of switches and the capacitor approximates a resistor. Spring 2014 Switched-Capacitor Circuits 4

  5. Introduction Spring 2014 Switched-Capacitor Circuits 5

  6. Introduction RC accuracy (matching). Large time constants implies large passive components. With SC the time constant is set by capacitor ratio and clock frequency (both precisely controlled). Spring 2014 Switched-Capacitor Circuits 6

  7. Introduction Spring 2014 Switched-Capacitor Circuits 7

  8. Building blocks Spring 2014 Switched-Capacitor Circuits 8

  9. Integrators Spring 2014 Switched-Capacitor Circuits 9

  10. Discrete integrators Analyze each clock phase separately Spring 2014 Switched-Capacitor Circuits 10

  11. Discrete integrators Spring 2014 Switched-Capacitor Circuits 11

  12. Discrete integrators Discrete time time constant Spring 2014 Switched-Capacitor Circuits 12

  13. Discrete integrators The discrete time equivalent time constant is defined by the capacitor ratio and clock frequency. • Allows precise time constant definition. • Allows large time constants without excessively large passive components. Spring 2014 Switched-Capacitor Circuits 13

  14. Integrator parasitic capacitance Poorly controlled and non-linear Spring 2014 Switched-Capacitor Circuits 14

  15. Parasitic insensitive integrators Critical for performance Turn off first (bottom plate sampling) Again, we analyze the charge transfer from one clock phase to the next to find the transfer function. Spring 2014 Switched-Capacitor Circuits 15

  16. Parasitic insensitive integrators Spring 2014 Switched-Capacitor Circuits 16

  17. Parasitic insensitive integrators The parasitic capacitors still affect settling, but not the signal charge transfer. Spring 2014 Switched-Capacitor Circuits 17

  18. Delay free integrator Same circuit as before, but modified clocking of the switches. Spring 2014 Switched-Capacitor Circuits 18

  19. Signal flow graph analysis • Now we have the fundamental building blocks (discrete time integrators), to realize filters. • We need a more convenient tool to analyze large systems. • Signal flow graph (SFG) analysis allows us to graphically analyze SC systems. Spring 2014 Switched-Capacitor Circuits 19

  20. Signal flow graph analysis Spring 2014 Switched-Capacitor Circuits 20

  21. SC filters A simple design strategy: • Start with a continuous time prototype • Replace resistors with SC resistor equivalents The resulting circuit is similar for input frequencies much lower than the sampling frequency • Use SFG to determine the z -domain transfer function Accurate description of the transfer function Spring 2014 Switched-Capacitor Circuits 21

  22. First order filters Filter design example. Start with the continuous time circuit. In this case: Spring 2014 Switched-Capacitor Circuits 22

  23. First order filters Replace the resistors with SC elements Spring 2014 Switched-Capacitor Circuits 23

  24. First order filters Spring 2014 Switched-Capacitor Circuits 24

  25. Switch sharing Some switches are redundant, we use this to simplify the circuit: Spring 2014 Switched-Capacitor Circuits 25

  26. Biquad filters Spring 2014 Switched-Capacitor Circuits 26

  27. Low-Q biquad Spring 2014 Switched-Capacitor Circuits 27

  28. Low-Q biquad Spring 2014 Switched-Capacitor Circuits 28

  29. Low-Q biquad Spring 2014 Switched-Capacitor Circuits 29

  30. High-Q biquad Spring 2014 Switched-Capacitor Circuits 30

  31. High-Q biquad Spring 2014 Switched-Capacitor Circuits 31

  32. Gain • Resettable gain circuit • Samples offset voltage during reset (reduces flicker noise) Spring 2014 Switched-Capacitor Circuits 32

  33. Gain Amplifier slew-rate requirement is high. Spring 2014 Switched-Capacitor Circuits 33

  34. Capacitive-reset gain Include a capacitor to hold the output during the reset phase. Avoid excessive slewing. Configurable positive or negative gain. Spring 2014 Switched-Capacitor Circuits 34

  35. Noise Spring 2014 Switched-Capacitor Circuits 35

  36. Noise Spring 2014 Switched-Capacitor Circuits 36

  37. Correlated double sampling (CDS) Spring 2014 Switched-Capacitor Circuits 37

  38. Fully differential circuits Real circuits are almost always fully differential. Coupled noise, power supply noise, substrate noise will mostly affect the common mode, while our signal is in the differential mode. Also, cancels even order harmonics. Spring 2014 Switched-Capacitor Circuits 38

  39. Charge injection Spring 2014 Switched-Capacitor Circuits 39

  40. Bootstrapped switch Spring 2014 Switched-Capacitor Circuits 40

  41. SC amplifier design Spring 2014 Switched-Capacitor Circuits 41

  42. Further reading Sansen, Analog Design Essentials, Springer, 2006, Ch. 17 Spring 2014 Switched-Capacitor Circuits 42

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