Ring Amplifiers for Switched Capacitor Circuits Benjamin Hershberg 1 - PowerPoint PPT Presentation

Ring Amplifiers for Switched Capacitor Circuits Benjamin Hershberg 1 , Skyler Weaver 1 , Kazuki Sobue 2 , Seiji Takeuchi 2 , Koichi Hamashita 2 , Un-Ku Moon 1 1 Oregon State University, Corvallis, OR, USA 2 Asahi Kasei Microdevices, Atsugi, Japan

A/D Scaling Trends: FoM 1 • Performance continues to scale well with process • FoM 1 best describes low/medium-resolution A/D performance 2 [Jonsson, NORCHIP 2010]

A/D Scaling Trends: FoM 2 • FoM 2 best describes high-resolution A/D performance • Noise floor degrades faster than power/speed improves. 3 [Jonsson, NORCHIP 2010]

Beating the Trend We need amplifiers that are: • Immune to SNR loss from low-voltage, degrading r o • Exploit digital scaling benefits • Avoid conventional RC-based settling 4

Beating the Trend - V DZ V OUT V IN + Ring Amplifier (Ring Amp, RAMP) 5

Ring Amplification Basic Theory

Ring Amplifier: Basic Theory RST Example MDAC V CMO Feedback Structure RST V IN AMP ±V REF RST C LOAD V CMX • Basic MDAC test structure 7

Ring Amplifier: Basic Theory RST Example MDAC V CMO Feedback Structure RST RST V IN V OUT V IN ±V REF RST C LOAD V CMX =0.6V • Ring Oscillator • Unstable… …but will oscillate around the correct settled value 8

Ring Oscillator Sample Waveform 1.2 1.2 1 1 V IN V CMX = 0.6V (ideal settled input value) 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 9

Ring Amplifier: Basic Theory RST Example MDAC V CMO Feedback Structure -V OS + RST RST RST - V IN V DZ ±V REF + RST RST C LOAD +V OS - V CMX • Split signal into two separate paths • Embed offset in each path 10

Ring Amplifier Sample Waveform V DEADZONE = 0mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 V AP V BP 0.2 0.2 - V IN V OUT 0 0 V DZ V A 0 1 2 3 4 5 6 0 1 2 3 4 5 6 + time (ns) time (ns) V BN V AN 11

Ring Amplifier Sample Waveform V DEADZONE = 0mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 V AP V BP 0.2 0.2 - V IN V OUT 0 0 V DZ V A 0 1 2 3 4 5 6 0 1 2 3 4 5 6 + time (ns) time (ns) V BN V AN 12

Ring Amplifier Sample Waveform V DEADZONE = 0mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 V AP V BP 0.2 0.2 - V IN V OUT 0 0 V DZ V A 0 1 2 3 4 5 6 0 1 2 3 4 5 6 + time (ns) time (ns) V BN V AN 13

Ring Amplifier Sample Waveform V DEADZONE = 0mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 V AP V BP 0.2 0.2 - V IN V OUT 0 0 V DZ V A 0 1 2 3 4 5 6 0 1 2 3 4 5 6 + time (ns) time (ns) V BN V AN 14

Ring Amplifier Sample Waveform V DEADZONE = 200mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 15

Ring Amplifier Sample Waveform V DEADZONE = 200mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) Plateaus form at dead-zone crossings 16

Ring Amplifier Sample Waveform V DEADZONE = 250mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 17

Ring Amplifier Sample Waveform V DEADZONE = 300mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 18

Ring Amplifier Sample Waveform V DEADZONE = 350mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 19

Ring Amplifier Sample Waveform V DEADZONE = 400mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) 20

Ring Amplifier Sample Waveform V DEADZONE = 250mV 1.2 1.2 1 1 0.8 0.8 Volts Volts 0.6 0.6 0.4 0.4 0.2 0.2 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 time (ns) time (ns) Decreasing V OV reduces slew-rate 21

V OV Dynamic Pinch-off A V2 *(V IN *A V1 + V OS ) A V2 +V OS - - V IN V OUT V DZ + A V1 -V OS + A V2 *(V IN *A V1 - V OS ) 22

V OV Dynamic Pinch-off A V2 *(V IN *A V1 + V OS ) V MIN > V SS ? A V2 → Pinchoff! +V OS - - V IN V OUT V DZ + A V1 -V OS + V MAX < V DD ? – I D decreases → Pinchoff! • V OV → I D 2 A V2 *(V IN *A V1 - V OS ) – R o increases • Dominant pole → DC 23

Ring Amplifier Core Benefits Slew-based charging • Charges with maximally biased, digitally-switched current sources – V OV = V DD – Can be very small, even for large C LOAD – Decouples internal speed vs. output load requirements Exponential dynamic stabilization • Very fast • Well defined tradeoffs 24

Ring Amplifier Core Benefits Scalability (Speed/Power) • Internal speed/power (mostly) independent of C LOAD – Inverter t d , crowbar current, parasitic C’s – Digital power-delay product scaling benefits apply • Power/speed product scales with digital process trends V DD I AVG D OUT D IN t d C GS PDP = V DD ·I AVG ·t d = E tot 25

Ring Amplifier Core Benefits Scalability (Output Swing / SNR) • Compression immune: rail-to-rail output swing – 50dB: Input-referred dead-zone size will limit accuracy – 90dB: dynamic pinch-off effects maintain high accuracy – V OV pinchoff: decreases V DSAT , decreses I D , increases r o 1 0.65 Small Swing Small Swing 0.9 Medium Swing Medium Swing Large Swing Large Swing 0.8 0.7 Volts Volts 0.6 0.6 0.5 0.4 0.3 0.2 0.55 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 time (ns) time (ns) 26

ADC Implementation Details

Split-CLS (Correlated Level Shifting) Ф A V OUT Ф S V x V IN Ф S A Φ 1 C CLS AMP1 Ф A V CMO (+/-V r ,0) V CLS A Φ 2 AMP2 Ф S V CMO • Split-CLS – Generalized form of Correlated Level Shifting (CLS) 28 [Hershberg, ISSCC 2010]

Split-CLS (Correlated Level Shifting) Ф A V OUT Ф S V x V IN Ф S A Φ 1 C CLS AMP1 Ф A V CMO (+/-V r ,0) V CLS A Φ 2 AMP2 Ф S V CMO Ф 1 : Amplifier Design Requirements • amp charges output Ф 1 Ф 2 directly Output Swing Large Small • processes full signal Slew Rate Large Small 29

Split-CLS (Correlated Level Shifting) Ф A V OUT Ф S V x V IN Ф S A Φ 1 C CLS AMP1 Ф A V CMO (+/-V r ,0) V CLS A Φ 2 AMP2 Ф S V CMO Ф 2 : Amplifier Design Requirements • opamp is level-shifted Ф 1 Ф 2 to mid-rail Output Swing Large Small • processes error only Slew Rate Large Small 30

Split-CLS (Correlated Level Shifting) • Optimized design for each phase – Increase overall accuracy & efficiency • This design: – Ф 1 : Ring Amp – Ф 2 : Telescopic opamp • Finite opamp gain error becomes approx. 1 / (A 1 *A 2 ) 55dB ring amp + 65dB opamp 120dB effective gain 31

Pipelined ADC Overview 3b: 2b + 1b redundancy (MDAC gain of 4 per stage) V IN + 3b 3b 3b 3b 3b 3b 3b V IN - C U = 200 fF C U = 100 fF C U = 50 fF C U = 50 fF C U = 50 fF C U = 50 fF FLASH includes 16C U total (differential) Uses Split-CLS: Ring Amp + Telescopic Opamp Uses Ring Amp Only dummy load 32

Pipelined ADC Stage 1 MDAC x6 (8 total) 2C U Φ SE Φ S V CMO V IN + C U ±V REF Φ A CLR V IN + V O + RAMP Φ S C U C CLS ±V REF Φ A Φ SE CLR V CMX Φ CLS V OTA_CM OTA Φ A Φ SE CLR ±V REF C CLS C U Φ S V IN - V O - RAMP Φ A CLR ±V REF C U V IN - V CMO Φ S Φ SE x6 2C U (8 total) 33

Pipelined ADC Stage 2-4 MDAC x6 (8 total) 2C U Φ SE Φ S V CMO V IN + C U ±V REF Φ A Φ A V IN + V O + RAMP Φ S C U C CLS ±V REF Φ SE Φ A V CMX Φ SE Φ CLS V OTA_CM OTA Φ A Φ SE ±V REF C CLS C U Φ S V IN - V O - RAMP Φ A Φ A ±V REF C U V IN - V CMO Φ S Φ SE 2C U x6 (8 total) 34

Pipelined ADC Stage 5-6 MDAC x6 (8 total) 2C U Φ SE Φ S V CMO V IN + C U ±V REF Φ A Φ A V IN + V O + RAMP Φ S C U ±V REF Φ SE Φ A V CMX Φ SE Φ A Φ SE ±V REF C U Φ S V IN - V O - RAMP Φ A Φ A ±V REF C U V IN - V CMO Φ S Φ SE 2C U x6 (8 total) 35

Ring Amplifier Core Structure V RP REFRESH V IN+ V OUT+ REFRESH REFRESH V RN • No need to refresh every cycle. • Can disable ring amp when not in use 36

Ring Amplifier Power Save Feature V RP REFRESH ENABLE ENABLE V IN+ V OUT+ REFRESH ENABLE FRONT ENABLE ENABLE REFRESH V RN • Only enable when amplifying or refreshing • Refresh only once every N cycles (during Ф S ) 37

Ring Amplifier CMFB V RP REFRESH ENABLE ENABLE V IN+ V OUT+ REFRESH ENABLE FRONT ENABLE ENABLE REFRESH V RN CMFB network V CMO REFRESH Identical ring amp for negative MDAC path 38

Float-Biased Switched Opamp Bias Network • Bias network isolation • Fast startup 39

Float-Biased Switched Opamp Bias Network Voltage Kickback Correct bias charge trapped Incremental bias voltage sampled 40

Float-Biased Switched Opamp Bias Network No Voltage Kickback Bias charge refreshed 41

Measurement Results

Input Spectrum 43

Performance vs. Input Frequency SNDR 100 SNR 95 SFDR 90 85 dB 80 75 70 65 ERBW > 10 MHz 60 0 2 4 6 8 10 Input Frequency (MHz) 44