Nanometer-Scale I I I -V Electronics J. A. del Alamo Microsystems Technology Laboratories, MIT The Age of Silicon Symposium MIT, July 25, 2014 Acknowledgements: • D. Antoniadis, A. Guo, D.-H. Kim, T.-W. Kim, D. Jin, J. Lin, W. Lu, A. Vardi, N. Waldron, L. Xia, X. Zhao • Sponsors: Intel, FCRP-MSD, ARL, SRC, NSF, Sematech, Samsung • Labs at MIT: MTL, NSL, SEBL 1
2 Moore’s Law = exponential increase in transistor density Intel microprocessors Moore’s Law
What if Moore’s Law had stopped in 1990? Cell phone circa 1990 GPS handheld device circa 1990 3
4 What if Moore’s Law had stopped in Laptop computer circa 1981 1980?
5 What if Moore’s Law had stopped in Desktop calculator 1970 1970?
What if Moore’s Law had never happened? Insulin pump circa 1960 “Personal calculator” circa 1960 1960 6
7 ? How far can Si support Moore’s Law? Moore’s Law
Transistor scaling Voltage scaling Power management demands reduction in supply voltage. 6 5 Supply voltage (V) 4 3 2 1 Intel microprocessors 0 1980 1985 1990 1995 2000 2005 2010 2015 Year of introduction Supply voltage reduction saturating in recent years 8
Voltage scaling Si transistor performance suffers Transistor current density: Transistor performance saturated in recent years 9
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Options for post-Si CMOS NMOS: GaAs, InGaAs, InP ~2x Si PMOS: Ge, InGaSb ~2x Si Different lattice constant for n-FETs and p-FETs del Alamo, Nature 2011 11
Electron injection velocity: I nGaAs vs. Si Measurements in High Electron Mobility Transistors (HEMTs): del Alamo, Nature 2011 • v inj (InGaAs) increases with InAs fraction in channel • v inj (InGaAs) > 2v inj (Si) at less than half V DD • ~100% ballistic transport at L g ~30 nm 12
I nGaAs HEMT: high-frequency record vs. time f T =710 GHz (NCTU ) Teledyne/MIT: 800 f T =688 GHz 700 600 MIT devices 500 on InP f T (GHz) substrate 400 300 200 on GaAs 100 substrate 0 1980 1990 2000 2010 Kim, EDL 2010 Year Best high-frequency performance of any transistor on any material system 13
I nGaAs Electronics Today UMTS-LTE PA module Chow, MTT-S 2008 40 Gb/s modulator driver 77 GHz transceiver Carroll, MTT-S 2002 Tessmann, GaAs IC 1999 Bipolar/E-D PHEMT process Single-chip WLAN MMIC, Morkner, RFIC 2007 Henderson, Mantech 2007 14
I nGaAs HEMT vs. MOSFET HEMT not suitable for logic: too much gate leakage current MOSFET incorporates gate oxide gate leakage suppressed 15
I nGaAs MOSFETs vs. HEMTs: historical evolution Lin, IEDM 2013 * *inversion-mode Progress reflects improvements in oxide/III-V interface 16
What made the difference? Atomic Layer Deposition (ALD) of oxide ALD eliminates surface oxides that pin Fermi level “Self cleaning” Huang, APL 2005 Clean, smooth interface without surface oxides • First observed with Al 2 O 3 , then with other high-K dielectrics • First seen in GaAs, then in other III-Vs 17
I nGaAs MOSFET: possible designs Enhanced gate control enhanced scalability 18
Self-Aligned I nGaAs Quantum-Well MOSFETs • Channel: In 0.7 Ga 0.3 As/InAs/In 0.7 Ga 0.3 As (1/2/5 nm) • Gate oxide: HfO 2 (2.5 nm, EOT~0.5 nm) 1.0 V gs -V t = 0.5 V L g =20 nm • Self-aligned contacts (L side ~5 nm) R on =224 m 0.8 I d (mA/ m) 0.4 V • Si compatible process (RIE, metals) 0.6 0.4 0.2 0.0 Lin, IEDM 2013 0.0 0.1 0.2 0.3 0.4 0.5 V ds (V) 5 nm 19
I nGaAs double-gate Fin-MOSFET Key enabling technologies: • BCl 3 /SiCl 4 /Ar RIE • digital etch 40 nm 30 nm Vardi, DRC 2014 Zhao, EDL 2014 20
Vertical nanowire I nGaAs MOSFETs 30 nm diameter InGaAs NW-MOSFET Zhao, IEDM 2013 Zhao, EDL 2014 • Nanowire MOSFET: ultimate scalable transistor • Vertical NW: uncouples footprint scaling from L g scaling • Top-down approach based on RIE + digital etch 21
Si integration: I nGaAs SOI MOSFETs III ‐ V bonded SOI process Mo n + cap of IBM Zurich: InGaAs channel Czornomaz, IEDM 2012 BOX p-Si InP donor wafer BOX: Al 2 O 3 InGaAs channel n + cap BOX BOX InP donor wafer InP donor wafer p-Si p-Si 1. MBE growth 2. ALD Al 2 O 3 3. Wafer bonding 4. InP etch back 22
Conclusions: exciting future for I nGaAs electronics on Silicon • Most promising material for ultra-high frequency and ultra-high speed applications first THz transistor? • Most promising material for n-MOSFET in a post- Si CMOS logic technology first sub-10 nm CMOS logic? • InGaAs + Si integration: THz + CMOS + optics integrated systems? 23
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