Lecture 11_12_13: PolyMUMPS (Multi User MEMS process) + Flexure mechanisms for MEMS Comb drives ME 645: MEMS: ME 645: MEMS: Design Fabrication Design Fabrication Design, Fabrication Design, Fabrication and Characterization and Characterization P.S. Gandhi P.S. Gandhi Mechanical Engineering Mechanical Engineering IIT Bombay IIT Bombay PRASANNA S GANDHI gandhi@me.iitb.ac.in PRASANNA S GANDHI gandhi@me.iitb.ac.in 1 1 Today Today � Pressure sensor: full Pressure sensor: full fabrication fabrication � MUMPS MUMPS � Details of Details of PolyMUMPs PolyMUMPs process process � Design rules Design rules � Ledit � Ledit Ledit software to develop your device by Ledit software to develop your device by software to develop your device by software to develop your device by polyMUMPs polyMUMPs process process � Examples of the devices made by Examples of the devices made by polyMUMPS polyMUMPS 2 1
Pressure sensor Pressure sensor � Q: Q: How do you conceive pressure sensor at How do you conceive pressure sensor at MEMS scale? MEMS scale? � Basic Basic conceptual ideas conceptual ideas � Structure?? Structure?? � Electromechanical Electromechanical Electromechanical sensing element?? Electromechanical sensing element?? sensing element?? sensing element?? Diaphragm subjected to differential pressure 3 Piezoresistive sensing Absolute Pressure Absolute Pressure Sensor Sensor 4 2
Fabrication steps for a piezoresistive gauge or differential, bulk micromachined pressure sensor Metal Insulator n-type epitaxial layer p-type diffusion p-type substrate Silicon nitride Glass 3: Deposit and pattern material 1: Deposit Insulator 4: Electrochemical etch of backside cavity 2: Diffuse piezoresistors 5: Anodic Glass bonding 5 Capacitive Capacitive Accelerometer Accelerometer Bulk Micromachining Bulk Micromachining Hinge Mass Silicon 4: Remove second masking layer ; 3: Remove first masking layer; 1: Etch recess cavities in silicon Anisotropic etch silicon 2: Deposit and pattern 3 masking layers; Anisotropic etch silicon Anisotropic etch silicon 6 3
MUMPs Process MUMPs Process � Multi User MEMS process Multi User MEMS process � Company MEMSCAP: offers PolyMUMPS, Company MEMSCAP: offers PolyMUMPS, MetalMUMPS, and SOIMUMPS MetalMUMPS, and SOIMUMPS � Developed at BSAC (Berkeley Sensors and Developed at BSAC (Berkeley Sensors and Actuators Center) in late 80’s Actuators Center) in late 80’s ) � We will study PolyMUMPs a 3 level polysilicon We will study PolyMUMPs a 3 level polysilicon micromachining process micromachining process 7 Cleaned Silicon Wafer Clean Silicon Wafer 8 4
Doping of Phosphorous on silicon wafer Using Standard diffusion furnace using POCL3 as furnace using POCL3 as Dopant source Clean Silicon Wafer Prevent charge feed through to substrate from electrostatic devices on the surface 9 Deposition of Silicon Nitride layer of thickness 600nm Using Standard LPCVD (Low Pressure Chemical (Low Pressure Chemical Vapor deposition) Clean Silicon Wafer Silicon Nitride layer Acts as insulation layer 10 10 5
Deposition of polysilicon film Thickness 500nm Using Standard LPCVD (Low Pressure Chemical (Low Pressure Chemical Vapor deposition) Clean Silicon Wafer Silicon Nitride layer Poly0 layer 11 11 Deposition of Photo resist Thickness 500nm Spin Coating method Clean Silicon Wafer Silicon Nitride layer Poly0 layer Photo resist layer 12 12 6
Mask Masking process Thickness 500nm UV Source and Mask Clean Silicon Wafer Silicon Nitride layer Poly0 layer Photoresist layer 13 13 Mask Masking and Exposure with UV source followed by development of photoresist photoresist Thickness 500nm Clean Silicon Wafer Silicon Nitride layer Poly0 layer Photoresist layer 14 14 7
Etching of poly0 layer Thickness 500nm Reactive Ion Etching (RIE) (RIE) Clean Silicon Wafer After etching photoresist Silicon Nitride layer is stripped in solvent bath Poly0 layer 15 15 Deposition of PSG (Phosphosilicate Glass) layer Thickness 2 μ m Thickness 2 μ m LPCVD process is used to deposit PSG (1 st Oxide to deposit PSG (1 st Oxide Layer) layer this is first Clean Silicon Wafer sacrificial layer Silicon Nitride layer Poly0 layer PSG layer (1 st Oxide) 16 16 8
Lithographic patterning of DIMPLE Depth 750 nm Depth 750 nm Dimples Wafer is coated with photoresist and second photoresist and second level (DIMPLE) is Clean Silicon Wafer lithographically patterned. Silicon Nitride layer Dimples are reactive ion Poly0 layer PSG layer (1 st Oxide) etched. After etching photoresist is stripped 17 17 Lithographic patterning of ANCHOR1 Dimples Anchor 1 Etch Wafer is coated with photoresist and second photoresist and second level (ANCHOR1) is Clean Silicon Wafer lithographically patterned. Silicon Nitride layer Anchor1 is reactive ion Poly0 layer PSG layer (1 st Oxide) etched. After etching photoresist is stripped 18 18 9
Deposition of POLY1 Layer along with PSG hard mask PSG Mask Clean Silicon Wafer Silicon Nitride layer Poly0 layer PSG layer (1 st Oxide) Poly1 Layer 19 19 Lithographic patterning of POLY1 layer 2 nd Oxide Layer Wafers are recoated with photoresist and third level photoresist and third level (Poly1) is lithographically Clean Silicon Wafer patterned. PSG is first Silicon Nitride layer etched to create a hard Poly0 layer PSG layer (1 st Oxide) mask and then poly1 is Poly1 Layer etched by RIE after 2 nd Oxide layer etching photoresist and 20 20 PSG mask are removed 10
Deposition of 2 nd oxide layer 2 nd Oxide Layer Second oxide layer 0.75 μ m of PSG is deposited μ m of PSG is deposited on water. This layer is Clean Silicon Wafer patterned twice to allow Silicon Nitride layer contact to both poly1 and Poly0 layer PSG layer (1 st Oxide) substrate layers. Poly1 Layer 2 nd Oxide layer 21 21 Lithographic patterning of P1_P2_Via Etch P1-P2 Via Etch P1-P2 Via Etch Wafer is coated with photoresist and fifth level photoresist and fifth level (POLY1_POL2_VIA) is Clean Silicon Wafer lithographically patterned. Silicon Nitride layer Unwanted second oxide Poly0 layer PSG layer (1 st Oxide) is etched in RIE, stopping Poly1 Layer on POLY1 and 2 nd Oxide layer photoresist is stripped 22 22 11
Lithographic patterning of using ANCHOR2 Etch Anchor 2 Etch Wafer is coated with photoresist and sixth level photoresist and sixth level (ANCHOR2) is Clean Silicon Wafer lithographically patterned. Silicon Nitride layer Second and first oxide Poly0 layer PSG layer (1 st Oxide) are etched in RIE, Poly1 Layer stopping on either POLY0 2 nd Oxide layer or Nitride and photoresist 23 23 is stripped Deposition of polysilicon and PSG hard mask dopping process process PSG Mask A 1.5 μ m undoped polysilicon layer is polysilicon layer is deposited followed by Clean Silicon Wafer 200 nm PSG hard mask Silicon Nitride layer layer. The wafers are Poly0 layer PSG layer (1 st Oxide) annealed at 1050 0 C for Poly1 Layer one hr and dope the 2 nd Oxide layer polysilicon and reduce Poly2 Layer 24 24 residual stress 12
Lithographic patterning of POLY2 Wafer is coated with photoresist and seventh photoresist and seventh level (POLY2) is Clean Silicon Wafer lithographically patterned. Silicon Nitride layer PSG hard mask and Poly0 layer PSG layer (1 st Oxide) Poly2 layers are etched in Poly1 Layer RIE, 2 nd Oxide layer Poly2 Layer 25 25 Deposition of Metal Layer Metal Layer Wafer is coated with photoresist and eighth photoresist and eighth level (METAL) is Clean Silicon Wafer Metal Layer lithographically patterned. Silicon Nitride layer Metal (gold with this Poly0 layer PSG layer (1 st Oxide) adhesion layer) is Poly1 Layer deposited by lift off 2 nd Oxide layer patterning. Poly2 Layer 26 26 13
Releasing a structure Metal Layer The structure are released by immersing released by immersing the chip in 49 % HF Clean Silicon Wafer Metal Layer solution. POLY! “rotor and Silicon Nitride layer POLY2 “hub” are relesed. Poly0 layer PSG layer (1 st Oxide) Poly1 Layer 2 nd Oxide layer Poly2 Layer 27 27 MUMPs Process MUMPs Process � Software Ledit for developing your own Software Ledit for developing your own designs: Demo designs: Demo � Some designs in the software Some designs in the software � How they look like after fabrication!! How they look like after fabrication!! 28 28 14
PolyMUMPs PolyMUMPs Process: Process: Case study Case study � Design of an XY flexural Design of an XY flexural nanostage nanostage: : � Need some fundamentals of flexure so Need some fundamentals of flexure so will look that in details will look that in details � Concept of flexure mechanism Concept of flexure mechanism � Idea: to have motion without friction Idea: to have motion without friction � Think how will you get such motion? Think how will you get such motion? 29 29 Flexure Mechanism Flexure Mechanism Advantages Advantages � No friction and hence no No friction and hence no wear and tear wear and tear d t d t Parasitic error � Nanometric Nanometric positioning positioning accuracy over wide range accuracy over wide range possible possible � Many different variations Many different variations for the purpose of for the purpose of achieving both x and y achieving both x and y achieving both x and y achieving both x and y motions motions � Some of them shown here Some of them shown here 15
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