ffs le ac uk m otivation developing a sram fpga based
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FFS@le.ac.uk M OTIVATION Developing a SRAM FPGA based Flash File - PowerPoint PPT Presentation

SEU P ROTECTION FOR H IGH - R ELIABILITY F LASH F ILE S YSTEMS Neil Perrins and Alistair A. McEwan FFS@le.ac.uk M OTIVATION Developing a SRAM FPGA based Flash File System. Intended for use in high reliability, high performance large


  1. SEU P ROTECTION FOR H IGH - R ELIABILITY F LASH F ILE S YSTEMS Neil Perrins and Alistair A. McEwan ∀ FFS@le.ac.uk

  2. M OTIVATION  Developing a SRAM FPGA based Flash File System.  Intended for use in high reliability, high performance large data storage applications.  We intend to improve the reliability of the Flash File System for use in high radiation environments such as space.

  3. S INGLE E VENT U PSETS  What is a Single Event Upset (SEU)?  Soft errors.  Affects memory elements.  Where do they occur?  High radiation environments including space.  Smaller silicon features mean they can occur nearly everywhere.  What are the effects of SEU in relation to an SRAM based FPGA?

  4. S INGLE E VENT U PSETS 01010101010101 Radiation Originally this data 01010101010101 element contains 01010101010101 0x55555555555555. 01010101010101 01010101010101 After one SEU this data 01010101000101 element contains 01010101010101 0x55555455555555. 01010101010101 01000101010101 After a while this data 01010101100101 element contains 01000101010101 0x55555454554515. 00010100010101

  5. E FFECTS OF SEU S ON FGPA Configuration bits of an FPGA are stored in SRAM. These bits can be effected by SEU. Pictures from “Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs” Nathaniel H. Rollins and Michael J. Writhlin

  6. P ROCESSES IN THE F LASH F ILE S YSTEM Consumer Process Consumer

  7. S IMULATOR  Fault Injection on the bit stream.  Partial Reconfiguration to simulate the SEUs.

  8. P ARTIAL R ECONFIGURATION  Reconfiguration is when the device is configured after start up.  Partial Reconfiguration is when a part of a device is reconfigured and dynamic partial reconfiguration is when only part of a device is reconfigured while the rest of the device is still running its circuit.

  9. S TRESS T EST THE F LASH F ILE S YSTEM  Going to use our test bench to test the Flash File System for susceptibility to SEU.  This should reveal parts of the Flash File System that require SEU Mitigation and give ideas for which parts need verification.

  10. R ADIATION E FFECTS ON E LECTRONICS  Single Event Effects  Single Event Gate Rupture  Single Event Latch Up  Single Event Functional Interrupt  Single Event Transient  Single Event Upset

  11. S UMMARY  Making a fault injection based test bench to simulate SEUs.  Using a fault injection test bench to stress test our flash file system.  This should help us find the areas we need to apply SEU mitigation.

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