Open Source FPGA Toolchain Vincent Gatine Introduction Open Source FPGA Toolchain FPGA LSE Summer Week 2015 iCE40 Flow Conclusion Vincent Gatine EPITA July 15, 2015 Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 1 / 25
What is a FPGA? Open Source Field Programmable Gate Array FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 2 / 25
Usage Open Source FPGA Toolchain Vincent Gatine Introduction FPGA SDR (BladeRF, USRP) iCE40 Pebble Time watch Flow LSE-PC Conclusion Prototypage Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 3 / 25
FPGA manufacturers Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Majors (80% market share): Altera, Xilinx Flow Minors: Lattice, Blue Silicon, Microsemi,. . . Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 4 / 25
How to program a FPGA? Open Source FPGA Toolchain Hardware Description Language (Verilog, VHDL) Vincent Gatine Verilog example Introduction module toplevel(input clock, FPGA input reset); iCE40 Flow reg cnt; Conclusion always @ (posedge reset or posedge clock) if (reset) cnt <= 0; else cnt <= cnt + 1; endmodule Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 5 / 25
Synthesis tools Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Quartus by Altera Flow Diamond (or Icecube 2) by Lattice Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 6 / 25
Why would we want an open source toolchain? Open Source FPGA Toolchain Vincent Gatine Introduction FPGA Quartus > 13.1 can’t program (old) cyclones iCE40 Linux support? Flow Knowledge Conclusion Why not? Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 7 / 25
iCE40 Open Source Produced by Lattice semiconductor FPGA Toolchain Low cost, low power FPGA Vincent Gatine Cheap boards and well documented Perfect platform to do some reverse engineering Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 8 / 25
Project Icestorm Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 bitstream RE by Clifford Wolf and Mathias Lasser iCE40 Flow Aim to document iCE40 programming bits Conclusion Many tools to pack, unpack, explain structures Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 9 / 25
iCE40 Structure Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 10 / 25
PLB Structure Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 11 / 25
Routing Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 12 / 25
IntraPLB routing Open Source FPGA Toolchain Vincent Gatine Introduction FPGA Local tracks iCE40 Flow Each PLB has 32 local tracks Conclusion Organized in 4 groups of 8 wires each Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 13 / 25
InterPLB routing Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 14 / 25
InterPLB routing Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 15 / 25
Programming process Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 16 / 25
Yosys Open Source FPGA Toolchain Vincent Gatine Introduction FPGA Yosys Open Synthesis Suite iCE40 Flow Created by Clifford Wolf Conclusion HDL to RTL synthesis tool Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 17 / 25
Yosys Open Source FPGA Toolchain Vincent Gatine Example Introduction # read design FPGA read_verilog mydesign.v iCE40 Flow # generic synthesis Conclusion synth -top mytop # write synthesized design write_verilog synth.v Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 18 / 25
Arachne-pnr Open Source FPGA Toolchain Vincent Gatine Place and route software aimed at iCE40LP/HX1K Introduction Written by Cotton Seed FPGA Takes RTL and constraints files (pin assignation) iCE40 Output plain text cells configurations Flow Conclusion constraints.pcf set_io a 1 set_io b 10 set_io y 11 Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 19 / 25
Icestorm Open Source FPGA Toolchain Vincent Gatine Introduction FPGA Icepack: plain text to bitstream iCE40 Flow Iceunpack: bitstream to plain text Conclusion IceProg: Program board Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 20 / 25
Example Open Source FPGA Toolchain Vincent Gatine and.v Introduction module top (input a, b, output y); FPGA assign y = a & b; iCE40 endmodule Flow Conclusion and.pcf set_io a 1 set_io b 10 set_io y 11 Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 21 / 25
Example Open Source FPGA Toolchain Vincent .io_tile 0 14 Gatine IOB_1 PINTYPE_0 Introduction IoCtrl IE_1 FPGA IoCtrl REN_0 iCE40 buffer io_1/D_IN_0 span4_horz_28 Flow Conclusion .logic_tile 1 11 LC_2 0000000001010101 0000 buffer local_g1_4 lutff_2/in_3 buffer local_g3_1 lutff_2/in_0 buffer neigh_op_lft_4 local_g1_4 buffer sp4_r_v_b_41 local_g3_1 Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 22 / 25
Conclusion Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 This is still a proof of concept Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 23 / 25
Questions? Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Questions? Flow Conclusion Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 24 / 25
Thanks! Open Source FPGA Toolchain Vincent Gatine Introduction mail: nurelin@lse.epita.fr FPGA iCE40 Links Flow Yosys Conclusion arachne-pnr icestorm Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 25 / 25
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