Emulation Circuitry Adds P1581 to an Off-the-Shelf SRAM Bob Russell - PowerPoint PPT Presentation

Nov 05, 2023 •329 likes •546 views

Emulation Circuitry Adds P1581 to an Off-the-Shelf SRAM Bob Russell (r.russell@ieee.org) P1581 Working Group may or may not agree with content. RJR BTW 13 SEP 2007 Outline Developments Since BTW 2006 P1581 Standard / Optional

Emulation Circuitry Adds P1581 to an Off-the-Shelf SRAM Bob Russell (r.russell@ieee.org) P1581 Working Group may or may not agree with content. RJR BTW 13 SEP 2007
Outline • Developments Since BTW 2006 • P1581 Standard / Optional Operations • Testmode Control Without Added Pins • Comparison of P1581 & 1149.1 for Memory Devices • P1581 Emulation Goals & General Concept • Emulation Circuitry Details • Conclusion: Emulation Allows First Silicon Success RJR BTW 13 SEP 2007
Developments Since BTW 2006 • Device ID Added – Standard 1149.1 Format (Extensions Possible) – P1581 Now Includes Key Features of 1149.1 • Emulation Method Devised – Means to Avoid First (Etc.) Silicon Errors – Significant Advantage Over 1149.1 • Emulation Demo Board – Proof of Concept – Supports Device / Tool Development – Design Available Without Charge RJR BTW 13 SEP 2007
P1581 Continuity Test Concept RJR BTW 13 SEP 2007
Continuity Test Gating - IAX RJR BTW 13 SEP 2007
Device Identification Option RJR BTW 13 SEP 2007
BIST & Device ID Options RJR BTW 13 SEP 2007
Non-Functional Stimulus Mode Control RJR BTW 13 SEP 2007
P1581 / 1149.1 Comparison RJR BTW 13 SEP 2007
P1581 Features Summary • Equivalent to 1149.1: – Continuity Test – Device ID Option – BIST Option – Other Public / Private Options • Improvements over 1149.1 – No Testpins Required – Same Device Usable in Legacy (non-P1581) and P1581 Board Applications RJR BTW 13 SEP 2007
P1581 Emulation Goals • Allow Off-the-Shelf Memory Devices to be Adapted for P1581 Design / Development Operations • Run At or Near Speed for Board Level Substitution • Support Test Jig Operation – Device Design Debug – Test & Test Tool Development RJR BTW 13 SEP 2007
Emulation for Demo • Cypress CY62157EV30 TSOP I • Chosen for Complexity • Dual Configuration: 1Meg x 8 / 512K x 16 • Emulator Must Work for All Board Applications • BYTE* Tied H / L for 16 / 8 Bit Operation • Data Pin Doubles as Address Pin (Potential Issue Because P1581 Uses Address Pins as Inputs, Data Pins as Outputs) • Note: TSOP I Version Different Than Others RJR BTW 13 SEP 2007
Emulation Environment RJR BTW 13 SEP 2007
P1581 Emulation Concept RJR BTW 13 SEP 2007
Bank Emulation Example RJR BTW 13 SEP 2007
Emulation - Simple Memory RJR BTW 13 SEP 2007
Emulation – Cypress 1M x 8 / 512K x 16 RJR BTW 13 SEP 2007
Summary • Enhancements Since BTW 2006 • P1581 Basic Operation • P1581 Options (Device ID, BIST, Public, Private) • NFS Mode Control (No Dedicated Testpins) • P1581 Vs. 1149.1 for Memory Devices • Emulation Goals & General Concept • Emulation Circuitry Details RJR BTW 13 SEP 2007
Conclusion • P1581 Includes Key 1149.1 Features • Emulation Facilitates First Silicon Success • P1581 Preferable to 1149.1 for Some Memory Devices RJR BTW 13 SEP 2007
Further Information • IEEE P1581 Working Group Website: http://grouper.ieee.org/groups/1581/ • Sit In on WG Telephone Conference • Author: r.russell@ieee.org RJR BTW 13 SEP 2007

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