CSE 140 Lecture 12 Standard Combinational Modules Professor CK Cheng CSE Dept. UC San Diego 1
Part III - Standard Combinational Modules (Chapter 5) Signal Transport •Decoder: Decode address •Encoder: Encode address •Multiplexer (Mux): Select data by address •Demultiplexier (DeMux): Direct data by address •Shifter: Shift bit location Data Operator •Adder: Add two binary numbers •Multiplier: Multiply two binary numbers 2
Interconnect: Decoder, Encoder, Mux, DeMux Processors Arbiter Data 1 Memory Bank Mux P1 Address 1 Data P2 Demux n-m Address 2 Mux Address m 2 m n Address k Decoder Data k Pk 3
1. Decoder • Definition • Logic Diagram • Application (Universal Set) • Tree of Decoders 4
iClicker: Decoder Definition A. A device that decodes B. An electronic device that converts signals from one form to another C. A machine that converts a coded text into ordinary language D. A device or program that translates encoded data into its original format E. All of the above 5
Decoder Definition: A digital module that converts a binary address to the assertion of the addressed device EN (enable) y 0 0 I 0 0 y 1 1 2 . 1 I 1 3 . 4 5 I 2 2 6 y 7 7 n to 2 n decoder 2 n outputs n inputs function: 2 3 = 8 n= 3 y i = 1 if En= 1 & (I 2, I 1, I 0 ) = i y i = 0 otherwise 6
1. Decoder: Definition • N inputs, 2 N outputs • One-hot outputs: only one output HIGH at once EN 2:4 Decoder 11 Y 3 A 1 10 Y 2 A 0 01 Y 1 00 Y 0 EN= 1 A 1 A 0 Y 3 Y 2 Y 1 Y 0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 7
Decoder: Logic Diagram En y i = m i En I 0 ’ I 1 ’ y 0 I 2 ’ y 0 = 1 if (I 2, I 1, I 0 )=(0,0,0) & En= 1 I 0 ’ I 1 ’ y 1 I 2 . . I 0 I 1 y 7 I 2 y 7 = 1 if (I 2, I 1, I 0 )=(1,1,1) & En= 1 8
Decoder Application: universal set {Decoder, OR} Example: Implement functions f 1 (a,b,c) = Σ m(1,2,4) f 2 (a,b,c) = Σ m(2,3), and f 3 (a,b,c) = Σ m(0,5,6) with a 3-input decoder and OR gates. y 1 y 2 En y 4 f 1 y 2 y 0 0 c I 0 y 1 1 2 y 3 I 1 b 3 f 2 . 4 . 5 a I 2 6 y 7 7 y 0 y 5 y 6 f 3 9
Decoders • OR minterms En 2:4 Decoder Minterm 11 AB A 10 AB B 01 AB 00 AB Y = AB + AB = A ⊕ B Y 10
Tree of Decoders Implement a 4-2 4 decoder with 3-2 3 decoders. y 0 0 d I 0 y 1 1 2 I 1 c 3 4 5 I 2 b 6 y 7 7 y 8 0 I 0 y 9 1 2 I 1 3 4 5 I 2 6 y 15 7 a 11
Tree of Decoders Implement a 6-2 6 decoder with 3-2 3 decoders. En En y 0 I 2, I 1, I 0 D 0 y 7 y 8 I 5, I 4, I 3 I 2, I 1, I 0 D 1 y 15 … … y 56 I 2, I 1, I 0 D 7 y 63 12
2. Encoder • Definition • Logic Diagram • Priority Encoder 13
iClicker: Definition of Encoder A. Any program, circuit or algorithm which encodes B. In digital audio technology, an encoder is a program that converts an audio WAV file into an MP3 file C. A device that convert a message from plain text into code D. A circuit that is used to convert between digital video and analog video E. All of the above 14
Encoder Definition: A digital module that converts the assertion of a device to the binary address of the device. En I 2n-1… I 0 y n-1 … y 0 Encoder Description: A En At most one I i = 1. (y n-1 ,.., y 0 ) = i if I i = 1 & Ε n = 1 I 0 0 y 0 0 1 2 y 1 (y n-1 ,.., y 0 ) = 0 otherwise. 1 3 4 2 y 2 A = 1 if En = 1 and one i s.t. I i = 1 5 6 I 7 7 A = 0 otherwise. 3 outputs A 8 inputs 15
Encoder: Logic Diagram En y 0 I 1 I 3 I 5 I 7 En y 1 I 2 I 3 I 6 I 7 16
Encoder: Logic Diagram En y 2 I 4 I 5 I 6 I 7 En A I 0 I 1 . . I 6 I 7 17
Priority Encoder: Definition Description: Input (I 2n-1 ,…, I 0 ), Output (y n-1 ,…, , y 0 ) (y n-1 ,…, , y 0 ) = i if I i = 1 & En = 1 & I k = 0 for all k > i (high bit priority) or En for all k< i (low bit priority) . E o = 1 if En = 1 & I i = 0 for all i, I 0 0 y 0 G s = 1 if En = 1 & i s.t. I i = 1 . 0 E 1 2 1 y 1 3 (G s is like A, and E o tells us if 4 2 5 y 2 6 enable is true or not). 7 I 7 Eo Gs 18
Priority Encoder: Implement a 32-input priority encoder w/ 8 input priority encoders (high bit priority). En I 31-24 y 32, y 31, y 30 Gs Eo I 25-16 y 22, y 21, y 20 Gs Eo I 15-8 y 12, y 11, y 10 Gs Eo I 7-0 y 02, y 01, y 00 Gs Eo 19
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