CSE 140 Lecture 12 Combinational Standard Modules CK Cheng CSE - PowerPoint PPT Presentation

CSE 140 Lecture 12 Combinational Standard Modules CK Cheng CSE Dept. UC San Diego 1

Part III. Standard Modules Interconnect Modules: 1. Decoder, 2. Encoder 3. Multiplexer, 4. Demultiplexer 2

Multiplexer • Definition • Logic Diagram • Application 3

iClicker: Multiplexer Definition A. A device that interleaves two or more activities B. A communications device that combines several signals for transmission over a single medium C. A logic circuit that sends one of several inputs out over a single output channel. D. The circuit that uses a common communications channel for sending two or more messages or signals. E. All of the above 4

3. Mux (Multiplexer) Definition: A digital module that selects one of data inputs according to the binary address of the selector. E Description If E = 1 y = D i where i = (S n-1 , .. , S 0 ) D 2n-1 -D 0 Else y y = 0 (Data input) S n-1,0 (Selector or Address) 5

Multiplexer (Mux): Definition • Selects between one of N inputs to connect to the output. • log 2 N -bit select input – control input E: Enable Data input D 0 0 y: Output D 1 1 S: Selector or Address 6

PI Q: What is the output of the following MUX? A.0 B.1 C.Can’t say E =1 0 y 0 1 1 S=1 7

Multiplexer (Mux): Definition • Selects between one of N inputs to connect to the output. • log 2 N -bit select input – control input S • Example: 2:1 Mux D 0 0 Y D 1 1 S S D 1 D 0 Y Y D 0 0 0 0 0 0 D 1 0 1 1 0 1 0 1 0 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 8

Multiplexer Definition: Example En D 0 0 S 1 S 0 y D 1 1 y D 2 2 D 3 3 S 1 S 0 9

Multiplexer Definition: Example E E=1: D 0 0 If D 0 = 0 and S 1 S 0 = 00 => y = 0 If D 0 = 1 and S 1 S 0 = 00 => y = 1 D 1 1 y D 2 2 D 3 3 S 1 S 0 10

Multiplexer: Logic Diagram • Tristates • Logic gates – For an N-input mux, – Sum-of-products form use N tristates – Turn on exactly one to Y D 0 D 1 00 01 11 10 S select the appropriate 0 0 0 1 1 input 1 0 1 1 0 Y = D 0 S + D 1 S S D 0 D 0 Y D 1 S D 1 Y 11

Multiplexer Application • Mux for a Boolean function with truth table as input A B Y 0 0 0 0 1 0 1 0 0 1 1 1 Y = AB A B 00 01 Y 10 11 12

Multiplexer: Application A A B Y A Y 0 0 0 0 0 0 0 1 0 Y = Y 1 0 0 AB 1 1 B B 1 1 1 13

Multiplexer Application: universal set {Mux} We use selector to decompose the function into smaller functions (less number of variables), which follows Shannon’s expansion. We simplify the decomposed functions using K-map, which follows consensus theorem. 14

Multiplexer Application: universal set {Mux} Example 1: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with an 8-input Mux. Id a b c f 0 0 0 0 1 1 0 0 1 1 2 0 1 0 - 3 0 1 1 0 4 1 0 0 0 5 1 0 1 0 6 1 1 0 0 7 1 1 1 1 15

Multiplexer Application: universal set {Mux} Example 1: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with an 8-input Mux. En Id a b c f 0 0 0 0 1 1 0 1 1 0 0 1 1 1 0 2 2 0 1 0 - 0 3 y 3 0 1 1 0 0 4 0 5 4 1 0 0 0 6 0 5 1 0 1 0 7 1 6 1 1 0 0 S 2 S 1 S 0 7 1 1 1 1 a b c 16

Example 2: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 4-input Muxes. E D (c) a b c = 0 c = 1 0 D 0 (c) = 0 0 0 1 1 D 1 (c) = y 1 0 D 2 (c) = 2 1 1 D 3 (c) = 3 S 1 S 0 a b 17

Example 2: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 4-input Muxes. E D (c) a b c = 0 c = 1 1 0 0 0 1 1 D 0 (c) =1 0 1 0 1 - 0 D 1 (c) =0 y 1 0 0 0 D 2 (c) =0 0 2 1 1 0 1 D 3 (c) =c c 3 S 1 S 0 a b 18

Example 3: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 2 - input Muxes. a 00 01 10 11 D (b,c) E 0 1 1 - 0 D 0 (b,c) 1 0 0 0 1 D 1 (b,c) 0 y 1 a 19

Example 3: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 2 - input Muxes. a 00 01 10 11 D (b,c) E 0 1 1 - 0 D 0 (b,c) 1 0 0 0 1 D 1 (b,c) b ’ 0 y D 0 (b,c) = b ’ D 1 (b,c) = bc D 1 (b,c) 1 1 - 0 0 c c 1 0 0 1 a b b 20

Example 3: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 2 - input Muxes. D 1 (b,c) b c = 0 c = 1 E 0 0 0 l 1 (0) = 0 1 0 1 l 1 (c) = c b ’ 0 y 1 a 21

Example 3: Given f (a,b,c) = Σm (0,1,7) + Σd(2), implement with 2 - input Muxes. D 1 (b,c) E b c = 0 c = 1 b ’ 0 0 0 l 1 (0) = 0 E 0 1 y 0 1 l 1 (c) = c 0 1 0 c 1 a b 22

4. Demultiplexers E x Control Input 23

4. Demultiplexers E y i = x if i = (S n-1 , .. , S 0 ) & E=1 y i = 0 otherwise y 2n-1 -y 0 x S(n-1,0) Control Input 24

Shifters • Logical shifter: shifts value to left or right and fills empty spaces with 0’s – Ex: 11001 >> 2 = 00110 – Ex: 11001 << 2 = 00100 • Arithmetic shifter: same as logical shifter, but on right shift, fills empty spaces with the old most significant bit (msb). – Ex: 11001 >>> 2 = 11 110 – Ex: 11001 <<< 2 = 00100 • Rotator: rotates bits in a circle, such that bits shifted off one end are shifted into the other end – Ex: 11001 ROR 2 = 01110 – Ex: 11001 ROL 2 = 00111 25

Shifter x n x n-1 x 0 x -1 y i = x i-1 if E = 1, s = 1, and d = L s = x i+1 if E = 1, s = 1, and d = R s / n E = x i if E = 1, s = 0 d l / r = 0 if E = 0 y n-1 y 0 x i+1 x i x i-1 Can be implemented with a mux s 3 2 1 0 1 E d 0 y i

Shifter Design A 3 A 2 A 1 A 0 shamt 1:0 2 00 S 1:0 01 Y 3 10 11 00 S 1:0 shamt 1:0 01 Y 2 10 2 11 4 4 A 3:0 Y 3:0 00 S 1:0 >> 01 Y 1 10 11 00 S 1:0 01 Y 0 10 11 27

Barrel Shifter shift x 0 1 0 1 0 1 s 0 O or 1 shift s 1 O or 2 shift 0 1 0 1 0 1 0 1 0 1 s 2 O or 4 shift 0 1 0 1 0 1 0 1 0 1 0 1 y

Shifters as Multipliers and Dividers • A left shift by N bits multiplies a number by 2 N – Ex: 00001 << 2 = 00100 (1 × 2 2 = 4) – Ex: 11101 << 2 = 10100 (-3 × 2 2 = -12) • The arithmetic right shift by N divides a number by 2 N – Ex: 01000 >>> 2 = 00010 (8 ÷ 2 2 = 2) – Ex: 10000 >>> 2 = 11100 (-16 ÷ 2 2 = -4) 29