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Technische Universitt Mnchen White-box Current Source Modeling Including Parameter Variation and its Application to Timing Simulation Christoph Knoth, Petra Nordholz Irina Eichwald, Ulf Schlichtmann Technische Universitt Mnchen


  1. Technische Universität München White-box Current Source Modeling Including Parameter Variation and its Application to Timing Simulation Christoph Knoth, Petra Nordholz Irina Eichwald, Ulf Schlichtmann Technische Universität München Infineon Technologies AG

  2. Technische Universität München Outline Current Source Model and Problem Formulation White-box characterization flow Nominal Parameterized CSM Implementation and Results Summary 2

  3. Technische Universität München Challenges in Timing Verification coupling coupling noise noise resistive resistive nonlinear nonlinear interconnects interconnects input cap input cap “arbitrary” “arbitrary” signals Current Source Cell Models support all this! signals Current Source Cell Models support all this! 3

  4. Technische Universität München CSM – Waveform and Load Independent Cell Model SUBCKT Driving Arbitrary CSM Cell Load with linear, nonlinear, static, few simple devices dynamic components 4

  5. Technische Universität München Applications V time • Timing Verification for arbitrary waveforms – Resistive Interconnects • Statistical Timing Analysis with variational waveforms – [Zolotov, “Compact modeling of variational waveforms”, ICCAD07] • Noise Analysis – [Gandikota, “Worst-case aggressor-victim alignment with current source driver models”, DAC09] • Reduce (Fast)SPICE simulation time – [This presentation] Requirements • Accurate, parametric CSM • Quick model generation 5

  6. Technische Universität München Outline Current Source Model and Problem formulation White-box characterization flow Nominal Parameterized CSM implementation and Results Summary 6

  7. Technische Universität München White-box Characterization Flow SPICE Logic Cell CSM Transistor Netlist (SUBCKT) Topology Analysis Physical Reasoning Parameter File More Information 9

  8. Technische Universität München Current Source Model with Physical Meaning parasitic delay CSM • DC port currents • port charges • lowpass filter (only large gates) 10

  9. Technische Universität München DC-Transfer Characteristic Automaticcaly Automaticcaly derived from derived from netlist netlist DC simulation DC simulation 11

  10. Technische Universität München Additional Dynamic Port Current Automatically Automatically derived from derived from netlist netlist DC simulation DC simulation 12

  11. Technische Universität München Voltage Approximation Error for Large Inverter (input) 13

  12. Technische Universität München Typical Lookup Tables for Model Components 14

  13. Technische Universität München Obtaining Parameterized Models - Linear Sensitivity The applicability crucially depends on the costs for the sensitivity. The applicability crucially depends on the costs for the sensitivity. 15

  14. Technische Universität München Obtaining Parameterized Models - Implementation • Usually transistor quantities cannot be sensed • Finite Difference always possible – Nominal Parameter Values – Deflect statistical Parameter – Rerun DC SPICE simulation 16

  15. Technische Universität München Sensitivity Lookup Tables Sensitivity of output current w.r.t. oxid thickness 17

  16. Technische Universität München Outline Current Source Model and Problem formulation White-box characterization flow Nominal Parameterized CSM implementation and Results Summary 18

  17. Technische Universität München Usage in Existing Simulators Characterization lookup .v tables .spi VerilogAMS CMI* module Simulator *Compiled Model Interface 19

  18. Technische Universität München CSM Implementation for SPICE Simulators ���������������������������������������� �������������������������������� ��������������������������� ����������������������������������������� ����������������� ������������������������������������������������������ ���������������������������������� ��������������������������� ����������������������������������������� ����������������� ������������������������������������������������������ ��������������������������������� ��������������������������� ����������������������������������������� ����������������� ������������������������������������������������������ ����� 20

  19. Technische Universität München Testing Delay and Slope of Individual Gates • 50 run with arbitrary parameter vector • 7 process parameters and Vdd-Drop (up to 15%) • different slope, different loads 21

  20. Technische Universität München Performance Gains of SPICE and FastSPICE Simulators c1355 22

  21. Technische Universität München Summary • White-box Current Source Model Generation – Components with physical meaning – Derived from netlist elements (not just port matching) – efficiency is crucial for parametric models • Parametric Models – Linear Sensitivities – Available for commercial Spice and FastSPICE simulators – Support VDD-Drop and parameter variation – Reduction of Monte Carlo Simulation times: • SPICE typically 50-80x • FastSPICE typically 4-9x Thank you for your attention. 23

  22. 24 BACKUP Technische Universität München

  23. 25 Simulator Technische Universität München

  24. Technische Universität München Basic Tasks in Circuit Simulation Jacobian Matrix g n i d a Residuum o L Newton Raphson Jacobian Update Simulation Control Simulator Kernel Compiled Model ⋅ Δ = − ( ) ( ) J x x F x Residuum Update = + Δ x x x + 1 n n Numerical Integration Linear Solver g n i v l o S Solution Vector 26

  25. Technische Universität München Voltage Approximation Error for large Inverter (Input) Voltage Approx. Error (Layer 7) Voltage Approx. Error (Layer 1) 27

  26. Technische Universität München Voltage Approximation Error for large Inverter (Output) Voltage Approx. Error (Layer 1) Voltage Approx. Error (Layer 5) 28

  27. Technische Universität München Model Generation (Cells with multiple stages) V in Q in Q N2 Q N1 Q out I dc,N1 V N I dc,out V out 29

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