SoC SoC Design Design Lecture 2: Design Methodology and Lecture - PowerPoint PPT Presentation

SoC SoC Design Design Lecture 2: Design Methodology and Lecture Lecture 2: Design Methodology and Lecture : Design Methodology and : Design Methodology and Strategies Strategies Shaahin Hessabi Shaahin Hessabi Department of Computer Engineering Department of Computer Engineering Sharif University of Technology Sharif University of Technology

Design Challenge Design Challenge � System complexity is increasing System complexity is increasing � Product lifetime is decreasing P Product lifetime is decreasing P d d t lif ti t lif ti i d i d i i ⇒ Design efficiency is essential Design efficiency is essential ⇒ New design methods are necessary New design methods are necessary New design methods are necessary New design methods are necessary ⇒ Higher abstraction levels are introduced Higher abstraction levels are introduced ⇒ CAD tools able to handle large amounts of data are needed CAD tools able to handle large amounts of data are needed g Sharif University of Technology SoC: Design Methodology 2

Design Methodology Design Methodology g g gy gy Budget ($, speed, area, power, Budget ($, speed, area, power, 1. 1. schedule, risk) schedule, risk) Low Low- -level building blocks, high level building blocks, high- - 2. 2. level architecture l l level architecture l l hit hit t t Specification Specification 3. 3. B h Behavioral design, verification Behavioral design, verification B h i i l d l d i i ifi ifi ti ti 4. 4. Logic design, verification Logic design, verification 5. 5. L L Layout, verification Layout, verification ifi ifi i i 6. 6. Sharif University of Technology SoC: Design Methodology 3

Modern Digital Systems Engineering Modern Digital Systems Engineering Sharif University of Technology SoC: Design Methodology 4

Coping with Complexity Coping with Complexity p p g g p p y y How to design complex systems? How to design complex systems? � Design Partitioning, Abstraction Design Partitioning, Abstraction 1. 1. Structured Design Structured Design 2. 2. Design and verification Design and verification dominate escalating dominate escalating project costs project costs Sharif University of Technology SoC: Design Methodology 5

Abstraction Levels Abstraction Levels Architecture : User’s perspective, what does it do? : User’s perspective, what does it do? Architecture � � Instruction set, registers I Instruction set, registers I t t ti ti t t i t i t � MIPS, x MIPS, x86 86, Alpha, PIC, ARM, … , Alpha, PIC, ARM, … Microarchitecture Microarchitecture (RTL) Microarchitecture Microarchitecture (RTL) (RTL) (RTL) � � � Single cycle, multi Single cycle, multi- -cycle, pipelined, superscalar? cycle, pipelined, superscalar? Logic : how are functional blocks constructed Logic : how are functional blocks constructed : how are functional blocks constructed : how are functional blocks constructed Logic Logic � � � Ripple carry, carry look Ripple carry, carry look- -ahead, carry select adders ahead, carry select adders Circuit : how are transistors used : how are transistors used Circuit � � Complementary CMOS, pass transistors, domino Complementary CMOS, pass transistors, domino Physical Physical : chip layout : chip layout � � Datapaths Datapaths, memories, random logic , memories, random logic Sharif University of Technology SoC: Design Methodology 6

Abstraction Levels Abstraction Levels Abstraction Levels Abstraction Levels � Design domains are divided in several abstraction levels: Design domains are divided in several abstraction levels: Sharif University of Technology SoC: Design Methodology 7

Abstraction: System Level Abstraction: System Level y � Highest abstraction level Highest abstraction level � Description with HDLs or graphical block diagrams Description with HDLs or graphical block diagrams Sharif University of Technology SoC: Design Methodology 8

Abstraction: Abstraction: Microarchitecture Microarchitecture Level Level � Register transfer system is a pure sequential machine Register transfer system is a pure sequential machine � Register transfer is a complete specification on what a Register transfer is a complete specification on what a R R i t i t t t f f i i l t l t ifi ifi ti ti h t h t chip will do on every cycle chip will do on every cycle � Microarchitecture Microarchitecture components: Microarchitecture components: Microarchitecture components: components: � Functional unctional units units o adder, multiplier, adder, multiplier, comparator, ALU, etc. comparator, ALU, etc. � Memory emory elements elements o latch, FF, register, register latch, FF, register, register- - file, RAM, ROM ... file, RAM, ROM ... fil fil RAM ROM RAM ROM � Interconnection nterconnection units units o bus, multiplexer b b bus, multiplexer lti l lti l Sharif University of Technology SoC: Design Methodology 9

Abstraction: Logic Level Abstraction: Logic Level g � Circuit description on a quite low abstraction level Circuit description on a quite low abstraction level � Today only used to design optimized functional blocks Today only used to design optimized functional blocks Sharif University of Technology SoC: Design Methodology 10

Abstraction: Circuit Level Abstraction: Circuit Level � Lowest abstraction level Lowest abstraction level � Transistor schematic or mask Transistor schematic or mask- -layout layout � Comparable to machine code in computer science Comparable to machine code in computer science Sharif University of Technology SoC: Design Methodology 11

Abstraction Domains Abstraction Domains � Designs can be performed in Designs can be performed in 3 3 abstraction domains: abstraction domains: � Behavioral domain B h B h Behavioral domain i i l d l d i i � Structural domain Structural domain � Physical domain � Physical domain Physical domain Physical domain � Each domain gives different freedoms to the designer Each domain gives different freedoms to the designer � Parallel or serial algorithms Parallel or serial algorithms g � Logic technology and bit Logic technology and bit- -slice slice � Full Full- -custom and macro custom and macro- -cells ... cells ... Sharif University of Technology SoC: Design Methodology 12

Abstraction Domains: Y Abstraction Domains: Y- -Chart Chart Sharif University of Technology SoC: Design Methodology 13

Behavioral Domain Behavioral Domain � Abstract function: Description and verification of first ideas Description and verification of first ideas � Function, and not implementation, is asked Function, and not implementation, is asked � Modeling with general purpose languages Modeling with general purpose languages � modula modula- -2 2, , pascal pascal, c, , c, c++ c++, lisp, ... , lisp, ... � matlab matlab, , mathematica mathematica, ... , ... � vhdl vhdl, hdl hdl , verilog verilog-hdl erilog hdl erilog hdl, cathedral, ... hdl cathedral , cathedral, ... cathedral � graphic languages as graphic languages as vee vee, ... , ... � Transformation to T Transformation to T f f ti ti t t structural domain: structural domain: synthesis synthesis synthesis synthesis Sharif University of Technology SoC: Design Methodology 14

Structural Domain Structural Domain � Interconnection of parts: description and verification of a Interconnection of parts: description and verification of a solution solution solution solution � Restrictions like delay, signal strength, etc. Restrictions like delay, signal strength, etc. � Modeling styles � Modeling styles Modeling styles Modeling styles � vhdl vhdl, , verilog verilog- -hdl hdl, , � schematic schematic � Transformation to physical Transformation to physical domain: logic minimization domain: logic minimization domain: logic minimization, domain: logic minimization, place and route tools place and route tools Sharif University of Technology SoC: Design Methodology 15

Physical Domain Physical Domain y � Physical objects with size and positions: description and description and verification of physical implementation verification of physical implementation � Technology specific implementation Technology specific implementation � Floorplan Floorplan, mask , mask- -layout, packaging layout, packaging � Description formats Description formats � cif cif, gds , gds2 2 � stick diagrams, symbolic layout stick diagrams, symbolic layout Sharif University of Technology SoC: Design Methodology 16

Design Strategies Design Strategies g g g g � The goal is a fast as possible The goal is a fast as possible transfer of an idea to a chip transfer of an idea to a chip � Descriptions in the Descriptions in the 3 3 abstraction abstraction domains domains d d i i � Structured strategies used: Structured strategies used: � Hierarchy Hierarch Hierarch Hierarchy � Regularity Regularity � Modularity � Modularity Modularity Modularity � Locality Locality Sharif University of Technology SoC: Design Methodology 17