Madison SLHC Worksop HCAL SLHC DAQ E. Hazen, S. X. Wu, J. Rohlf, - PowerPoint PPT Presentation

Madison SLHC Worksop HCAL SLHC DAQ E. Hazen, S. X. Wu, J. Rohlf, Boston University with J. Mans, University of Minnesota A. Baden, R. Bard, University of Maryland and hopefully many others! Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 1

Introduction ● Propose to Develop a test-bed system for SLHC calo trigger/DAQ development ● Based on uTCA standard(s) – Input from existing HCAL (and ECAL?) front-ends – Input from existing TTC system – Output to existing GCT – Output to existing DAQ (via FRLs) ● Three modules: – Trigger/Readout Module (use GCT processor?) – Clock/Timing Module (new) – DAQ/Hub Module (new) Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 2

uTCA Standard (based on AMC) Emphasis on high-speed communication and reliability Should be inexpensive hardware due to anticipated high telecoms volume Backplane with 21 lanes (serial) each ~ 4Gb/sec (topology not specified) 150mm width “shelf” Double-high double-wide module Double-high single-wide module Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 3

Schroff development system, about US$5k Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 4

Proposed size for our modules Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 5

Typical Crate Layout Up to 12 generic module (AMC) slots Power distribution MCH (Hub card) provides utility control functions Ethernet to each AMC slot for control MCH (opt) AMC 1 AMC 2 AMC 3 Power Power MCH Typical commercial backplanes provide 1 or more star connections to MCH slots, and various point-to-point connections between AMC slots Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 6

Why AMC / uTCA? ● High performance (20 x 4Gb/s per slot) ● Flexible (can define own backplane topology) ● Inexpensive (widespread telecoms use) ● Compact ● It may not be the final answer for SLHC hardware, but it is much better than VME! Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 7

Trigger/Readout Module ● Use GCT processor module if possible – Brief summary here... details later (Matt Stettler) – AMC double module – 12 in/ 12 out fibers – All 21 fabric lanes to crosspoint sw – Ethernet control – V5LX110T FPGA Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 8

Trigger/Readout Module ● HCAL HTR Functions – Receive front-end data – Make TP, synchronize to correct Bx – Perform RCT functions (or subset?) – Send fragments to DAQ on L1A ● ECAL integration? Still too early to say, but it would be desirable Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 9

Trigger/Readout Hardware 16 16 Fibers in 16 20 48 HCAL ch uTCA 72x72 21 Virtex-5 FPGA Crosspoint 3.2Gb Switch 16 20 Links 16 Fibers out to GCT 16 Ethernet Hardware maps nicely to function of one HCAL HTR uC 16 fibers in, 16 fibers out ~2X FPGA resources plus 10X RAM, DSPs Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 10

DAQ/Hub Module ● MCH Functions of uTCA – Power Module Management – Ethernet Switch – Carrier Management – Simple switch fabric (crosspoint switch?) ● DAQ Functions – Receive L1A and event fragments – Build events and send to FRL via SLink64 Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 11

HCAL DCC limitations PCI bus bottleneck 2 x 100MBytes/sec max! HTR Inputs: 80MBytes/sec per 24 FE chan. SLINK out Total of 12 used 256 MBytes/sec per DCC (LVDS serial) Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 12

DAQ/Hub Module SDRAM SLink 64 FED 1 Crosspoint Switch uTCA SLink 64 FED 2 ? 3.2Gb FPGA Links CPLD/FPGA Management Functions Other DAQ Output options i.e. 10-40GbE Ethernet Switch uC Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 13

DAQ/Hub Module ● Plenty of BW – 3.2Gb/sec per port ~ 400MB/s ● Much simpler architecture with all in one FPGA. ● Bottleneck is now DAQ output... if DAQ is upgraded we need to explore higher-bandwidth options. Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 14

uTCA Prototype System Up to 16x12 Fibers in (576 HCAL channels, same as current crate) Ethernet (control) Timing/Control DAQ/MCH T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC T/R AMC Power Power S-Link 64 TTC Fiber (1 or 2) Up to 16x12 Fibers out to GCT Modules will be compatible with commercial backplane or custom backplane developed for GCT Start with minimal system (one of each module) this year Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 15

Development Plan ● Procure and Study Standards (AMC, uTCA etc) – Have standards... reading them now :) ● Buy development hardware – crate, power, backplane ● Develop DAQ/Hub and Trigger/Control modules ● Obtain a processor module when available ● Commission and test with simple firmware ● Hopefully by Summer '08! Eric Hazen – Boston University 29 November 2007 SLHC Calo Trigger Workshop - Madison 16