DATA COMMUNICATION IN INSIDE A COMPUTER COMPUTER BU BUS S ARCHITECTURE ECE 422 – DATA COMMUNICATIONS & COMPUTER NETWORKS Friday, 13 March 2020
GENERAL BL BLOCK DIA IAGRAM OF TH THE COMPUTER SYSTEM Processing Input Output Input devices: Output It is used to insert data devices: into a computational It is used to retrieve device information from a CPU computational device Mouse Keyboard Monitor Output Input Joystick Projector Controller Speakers Memory
WHAT IS A COMPUTER SYSTEM BUS? 1. A computer system bus is a name given to electronic pathways consisting of a number of conducting wires to which all the CPU, memory, secondary memory and peripheral devices attach, or 2. A system bus in a single computer connects the major components of the computer system. 3. The bus technique was developed to provide cost effective connectivity and to make it easier to attach peripheral devices . 4. It constitutes a data bus, address bus and control bus.
ADVANTAGES OF BUSES I/O I/O I/O Device Device Device Memory Processor 1. Versatility: • New devices can be added easily • Peripherals can be moved between computer systems that use the same bus standard 2. Low Cost: • A single set of wires is shared in multiple ways
DISADVANTAGES OF BUSES I/O I/O I/O Device Device Device Memory Processor 1. It creates a communication bottleneck • The bandwidth of that bus can limit the maximum I/O throughput 2. The maximum bus speed is largely limited by: a) The length of the bus b) The number of devices on the bus c) Performance of peripheral devices which have: - Widely varying latencies - Widely varying data transfer rates
BASIC BUS TE TERMINOLOGY (1 (1) 1. Bus protocol : Rules determining the format and transmission of data through bus. 2. Parallel bus : Data is transmitted in parallel. a) Advantage: fast b) Disadvantage: high cost for long distance transmission, interference between lines at high frequency. 3. Serial bus : data is transmitted in serial. a) Advantage: low cost for long distance transmission, less interference. b) Disadvantage: slow 4. Bus master : The device control access to the bus. Other devices are called slaves
BASIC BUS TE TERMINOLOGY (2 (2) 1. Local (system) bus : CPU main memory. 2. Front Side Bus (FSB): 1. Original concept: CPU components 2. Modern Intel architecture: CPU NorthBridge chipset 3. Back side bus : CPU L2 cache, CPU Southbridge 4. Memory bus : Northbridge chipset main memory 5. AGP bus : Northbridge chipset GPU 6. ISA, EISA, VLB, PCI, Firewire, USB, 7. PCI-Express bus : motherboard peripheral devices.
A COMPUTER SYSTEM WIT ITH ONE BUS: BACKPLANE BUS Backplane Bus Processor Memory I/O Devices 1. A single bus (the backplane bus) is used for: • Processor to memory communication • Communication between I/O devices and memory 2. Advantages: Simple and low cost 3. Disadvantages: slow and the bus can become a major bottleneck Example: Original IBM PC (1982)
A COMPUTER SYSTEM WIT ITH TWO BUSES Processor Memory Bus Processor Memory Bus Bus Bus Adaptor Adaptor Adaptor I/O I/O I/O Bus Bus Bus 1. I/O buses tap into the processor-memory bus via bus adaptors: • Processor-memory bus: mainly for processor-memory traffic • I/O buses: provide expansion slots for I/O devices 2. Apple Macintosh-II • NuBus: Processor, memory, and a few selected I/O devices • SCCI Bus: the rest of the I/O devices
COMPUTER SYSTEM WIT ITH THREE-BUS SYSTEM Processor Memory Bus Processor Memory Bus Adaptor Bus Adaptor I/O Bus Backplane Bus Bus I/O Bus Adaptor 1. A small number of backplane buses tap into the processor-memory bus • Processor-memory bus is used for processor-memory traffic • I/O buses are connected to the backplane bus 2. Advantage: loading on the processor bus is greatly reduced
BUS PERFORMANCE/MEASUREMENT We measure data transfer on a bus by two metrics: • Bus width: indicates the number of wires in the bus for transferring data. • Bus bandwidth: refers to the total amount of data that can theoretically be transferred on the bus in a given unit of time.
EXAMPLE: CALCULATING BANDWIDTH OF A BUS A bus has a width of 16 bits and operates at a clock speed of 133 MHz. Find the bandwidth (transfer speed), S in (i) bits/sec (ii) Bytes/Sec (iii) KB/s (iv) Mb/s SOLUTION S = 16 X 133 X 10 6 = 2,128*10 6 bit/s = 2,128 X 10 6 /8 = 266*10 6 bytes/s = 266 X 10 6 /1000 = 266*10 3 KB/s = 266 X 10 3 /1000 = 266 MB/s
DIF IFFERENT TY TYPES OF COMPUTER BUSES - IB IBM 1. 1982 – Industry Standard Architecture (ISA) by IBM - 4.77 MB/s (8 bits wide at 4.77 MHz) 2. 1988 – Extended Industry Standard Architecture (EISA) - 33.32 MB/s (32 bits at 8 MHz) 3. Early 90's - Peripheral Component Interconnect (PCI) - 133MB/s (32-bit at 33 MHz) 4. Mid 90's – Universal Serial Bus(USB) 1.0 - 1.5 MB/sec 5. 2000 – Universal Serial Bus (USB) 2.0 - 60 MB/sec 6. 2010 – Universal Serial Bus (USB) 3.0 - 500 MB/sec 7. 2011 - Peripheral Component Interconnect (PCI) Express 3.0 - 31.5 GB/s
WID IDTH AND BANDWIDTH OF SOME TY TYPICAL BUSES Bus Width (bit) Bandwidth (MB/s) 16-bit ISA 16 15.9 EISA 32 31.8 VLB 32 127.2 PCI 32 127.2 64-bit PCI 2.1 (66 MHz) 64 508.6 AGP 8x 32 2,133 USB 2 1 Slow-Speed: 1.5 Mbit/s Full-Speed: 12 Mbit/s Hi-Speed: 480 Mbit/s Firewire 400 1 400 Mbit/s
SYNCHRONOUS AND ASYNCHRONOUS BUSES 1. Synchronous Bus: • Includes a clock in the control lines • A fixed protocol for communication that is relative to the clock • Advantage: • involves very little logic and can run very fast • Disadvantages: - Every device on the bus must run at the same clock rate - To avoid clock skew, the cables cannot be long if they are fast 2. Asynchronous Bus: • It is not clocked • It can accommodate a wide range of devices • It can be lengthened without worrying about clock skew • It requires a handshaking protocol
ORGANIZATION OF A COMPUTER SYSTEM INPUT AND CPU MEMORY OUTPUT System BUS Control BUS It is used by the CPU to communicate with other devices Address BUS It is used to specify a physical address for the CPU Data BUS It allows the transfer of data between two components on the motherboard, or between two CPUs
TYPES OF COMPUTER BUSES There are two types of computer buses, i.e 1. Internal bus (or system bus or Front Side Bus (FSB)): A group of wires or electronic pathways that happen inside system unit. 2. External bus (expansion bus): A group of wires or electronic pathways that facilitate communication between the system unit and other devices.
SYSTEM BUS (1) - DATA BUS 1. A data bus is a collection of wires (transmission paths) through which data is transmitted from one part of a computer to another is called Data Bus. 2. Data Bus can be thought of as a highway on which data travels within a computer. 3. This bus connects all the computer components to the CPU and main memory. 4. The size (width) of bus determines how much data can be transmitted at one time. 5. A 16-bit bus can transmit 16 bits of data at a time. 6. 32-bit bus can transmit 32 bits at a time.
SYSTEM BUS (2) - ADDRESS BUS 1. A collection of wires used to identify particular location in main memory or a specific location of secondary memory is called Address Bus. 2. Or, in other words, the information used to describe the memory locations travels along the address bus. 3. The size of address bus determines how many unique memory locations can be addressed. a) A system with 4-bit address bus can address 2 4 = 16 Bytes of memory. b) A system with 16-bit address bus can address 2 16 = 64 KB of memory. A system with 32-bit address bus can address 2 32 = c) 4.3 GB of memory
3. Memory controller locates 1. CPU places address of the memory location and loads it location it wants to read on into data lines. the address lines. 2. After the voltages on the address lines have become stable, CPU asserts MREQ and RD lines.
SYSTEM BUS (3) - CONTROL BUS 1. The connections that carry control information between the CPU and other devices within the computer is called Control Bus. 2. The control bus carries signals that report the status of various devices or type of operation being carried out. 3. The control bus can, for instance, be used to indicate whether the CPU is reading from memory or writing to memory.
BRIDGE-BASED BUS ARCHITECTURES 1. A computer system may include many buses which are segregated by bridges. 2. Advantage: Bridges allow the many buses to operate simultaneously. 3. Intel architecture:
INTEL BUS ARCHITECTURE The Northbridge connects with the faster I/O’s such as the The Northbridge and RAM and the AGP, the CPU Southbridge are sometimes Northbridge is bigger looking referred to as chipsets. than the Southbridge, the Southbridge connects with the Front Side Bus (FSB) slower I/O’s such as the USB and the BIOS. AGP RAM North Bridge (GPU) Mouse Keyboard Legacy Joystick PCI(e) NIC BIOS South Bridge USB ISA IDE (Industry standard (integrated drive architecture) electronics)
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