Impact of the layout on the electrical characteristics of - PowerPoint PPT Presentation

Impact of the layout on the electrical characteristics of double-sided silicon 3D sensors fabricated at FBK M. Povoli 1 , 2 A. Bagolini 3 M. Boscardin 3 G.-F. Dalla Betta 1 , 2 G. Giacomini 3 . Mattedi 3 E. Vianello 3 N. Zorzi 3 F 1 Dipartimento di Ingegneria e Scienza dell’Informazione University of Trento, Italy 2 INFN Sezione di Padova Gruppo Collegato di Trento 3 Centro per i Materiali e i Microsistemi Fondazione Bruno Kessler (FBK), Trento, Italy 8th "Hiroshima" Symposium(HSTD-8) December 05 - 08, 2011 [Work supported by INFN CSN V, projects "TREDI" (2005-2008) and "TRIDEAS" (2009-2011), and INFN CSN I, project ATLAS]

Outline 3D detectors Full 3D and simplified approaches Current status at FBK (short summary) Electrical characterization of 3D test structures with different layouts Available layouts of 3D diodes I-V measurements with variable temperature Selected simulation results for different devices Layout effects on detector capacitance Layout effects on electrical quantities inside the devices Conclusions and outlook 2 / 16 Povoli et al.

3D silicon detectors Original idea and simplified approaches [S. Parker et. al. in NIMA [E. Vianello et al., NSS11, Paper N10-6] 395 (1997), 328] [G. Pellegrini et al., NIMA 592 (2008) 38] Full 3D Simpilfied approaches 1. Single side process 1. Double side processes 2. Passing through 2. Passing through columns (FBK), columns non-passing through columns (CNM) 3. Active-edge 3. Slim-edge (FBK), 3D guard ring (CNM) 4. P-spray (FBK), p-stop (CNM) 3 / 16 Povoli et al.

Current status at FBK (short summary) [E. Vianello et al., NSS11 Conference Record, Paper N10-6] Investigation Considerations ◮ Try to gain insight into device ◮ ATLAS07: bad currents and low behavior using TCAD breakdown (p-spray too high) ◮ Measured p-spray, N + and P + ◮ ATLAS08: better current (less profiles mechanical stress) still low ◮ Disentangle the effects of each breakdown component of the device ◮ ATLAS09: good currents and higher ◮ Test performed on 3D diodes (two breakdown (p-spray adjusted) terminal devices, easy to test) 4 / 16 Povoli et al.

FE-I4 3D diode with Field Plate, Layout details FRONT BACK ◮ Layout compatible with the ATLAS FE-I4 pixel ◮ Minimum N + to P + distance equal to 15 µ m ◮ WITH Field Plate ( L FP = 4 µ m ) ◮ Back side metal and P + patterned ◮ Simulated cell: 25 × 62 . 5 × 230 µ m 3 5 / 16 Povoli et al.

Other available 3D diodes FE-I4 3D diode CMS 3D diode 80 µ m 3D diode ◮ 80 µ m pitch ◮ ◮ Layout compatible with the Similar to the previous FE-I4 N + and metal grid both on ◮ CMS pixel detector diode N + columns connected only front and back sides N + columns connected only ◮ ◮ Minimum N + to P + distance ◮ through metal through metal Minimum N + to P + distance equal to 20 µ m Larger N + to P + distance ◮ ◮ ◮ equal to 18 µ m WITH Field Plate ◮ NO Field Plate ( L FP = 5 µ m ) ◮ NO Field Plate ◮ Simulated cell: ◮ Simulated cell: 40 × 40 × 230 µ m 3 50 × 75 × 230 µ m 3 6 / 16 Povoli et al.

IV measurements with variable temperature IV Curves I-V 80BIG I-V FEI4 Setup 8e-08 8e-08 35 ° C 35 ° C 7e-08 7e-08 30 ° C 30 ° C ◮ Devices coming from wafer 25 ° C 25 ° C 6e-08 6e-08 20 ° C 20 ° C Currents [A] Currents [A] 15 ° C 15 ° C 5e-08 5e-08 W20 of the ATLAS09 batch 10 ° C 10 ° C 4e-08 5 ° C 4e-08 5 ° C 0 ° C 0 ° C ◮ Devices were diced and 3e-08 3e-08 -5 ° C -5 ° C -10 ° C -10 ° C 2e-08 2e-08 wire bonded on small PCBs -15 ° C -15 ° C -20 ° C -20 ° C 1e-08 1e-08 ◮ Wire bonding contribution is 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 negligible Reverse voltage [V] Reverse voltage [V] I-V CMS I-V FEI4-FP ◮ Temperature variation 8e-08 8e-08 35 ° C 35 ° C between − 20 ◦ C and 35 ◦ C 7e-08 7e-08 30 ° C 30 ° C 25 ° C 25 ° C 6e-08 6e-08 inside the climatic chamber 20 ° C 20 ° C Currents [A] Currents [A] 15 ° C 15 ° C 5e-08 5e-08 10 ° C 10 ° C ◮ Measurements performed 4e-08 5 ° C 4e-08 5 ° C 0 ° C 0 ° C 3e-08 3e-08 -5 ° C -5 ° C with HP4145 -10 ° C -10 ° C 2e-08 2e-08 -15 ° C -15 ° C -20 ° C -20 ° C 1e-08 1e-08 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 Reverse voltage [V] Reverse voltage [V] Preliminary results ◮ Each type of device has its own characteristic behavior ◮ Breakdown voltages between 40 and 50V ◮ Different current slope for different devices ◮ More details in the next slide... 7 / 16 Povoli et al.

IV measurements with variable temperature Breakdown voltage vs. temperature 60 80BIG Breakdown voltages FEI4-FP Breakdown voltage [V] CMS 55 ◮ Devices breakdown � V BD = 48.50 mV/ ° C FEI4 between 40 and 50V ◮ Linear increase with 50 � V BD = 76.82 mV/ ° C temperature ◮ The increase is between 45 ∼ 50 and ∼ 80 mV / ◦ C � V BD = 55.42 mV/ ° C ◮ In agreement with the 40 expectation � V BD = 50.72 mV/ ° C [Crowell, C. R. and S. M. Sze, Appl. Phys. 35 Lett. 9, 6 (1966) 242-244.] -20 -10 0 10 20 30 40 Temperature [ ° C] 8 / 16 Povoli et al.

IV measurements with variable temperature Purpose ◮ Distinction between thermal generation and avalanche generation � 2 Equation � � � �� T E 1 1 I ( T ) = I ( T R ) exp − T R 2 k B T R T Results ◮ T R = 293 . 15 ◦ K ◮ The calculation was performed at different bias Arrhenius plot - 80BIG Arrhenius plot - FEI4 voltages for all the 1e-07 1e-07 temperatures considered ◮ 1e-08 1e-08 Good agreement at low Currents [A] Currents [A] biases (e.g 10V) 1e-09 1e-09 ◮ Closer to breakdown the Meas. at 10V Meas. at 10V agreement is lost (e.g. 1e-10 1e-10 Calc. at 10V Calc. at 10V 30V) Meas. at 30V Meas at 30V Calc. at 30V Calc. at 30V ◮ 1e-11 1e-11 Avalanche generation 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 adds up to 1000/T [ ° K -1 ] 1000/T [ ° K -1 ] Shockley-Read-Hall (SRH) generation Arrhenius plot - CMS Arrhenius plot - FEI4-FP ◮ FEI4 diode without field 1e-07 1e-07 plate seems to show 1e-08 1e-08 breakdown behavior Currents [A] Currents [A] before the others!! 1e-09 1e-09 Meas. at 10V Meas. at 10V 1e-10 Calc. at 10V 1e-10 Calc. at 10V Meas. at 30V Meas. at 30V Calc. at 30V Calc. at 30V 1e-11 1e-11 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 1000/T [ ° K -1 ] 1000/T [ ° K -1 ] 9 / 16 Povoli et al.

Parameters, models and data extraction Structure parameters ◮ Thanks to symmetry only 1/4 of elementary cell is simulated ◮ Dimensions depending on the simulated layout ◮ Thickness: 230 µ m ◮ Measured xide charge: 3 × 10 11 cm − 2 ◮ Measured oxide thickness: 1 µ m Measured (SIMS) doping profiles for p-spray and N + and P + ◮ diffusions Models and simulation ◮ Mobility: Doping Dependent, High Field Saturation, E-Field normal ◮ Generation/Recombination: SRH, Avalanche Bias ramp applied on the P + electrode from the back side ◮ Data analysis ◮ Monitor electrical quantities in different regions of the structure ◮ Understand where the breakdown is occurring ◮ 2D slices at different depths ◮ Visualization of the most important quantities for our purpose ◮ 1D cut extraction from 2D slices to look at the distribution of the electrical quantities 10 / 16 Povoli et al.

C-V measurements vs. C-V simulations Only available for 80 µ m diode (Work in progress) 400 Only columns Columns and p-spray 350 with N + diffusion with P + diffusion Capacitance [pF] 300 Full structure Measured 250 200 150 100 50 0 10 20 30 40 50 Reverse voltage [V] Results ◮ Electrodes contribution: ∼ 71pF (constant) ◮ p-spray causes an increase of ∼ 35pF (basically constant) P + diffusion and metal on the back side does not cause much increase ◮ N + diffusion and metal on the front side cause an increase of ∼ 41pF at ◮ a bias voltage of 20V ◮ At higher biases the contribution of front side saturates to a value similar to the one obtained only with electrodes and p-spray ( ∼ 111pF ) ◮ Measured capacitance does not saturate at 40V: more voltage required ◮ Results for other devices available soon

Selected simulation results (summary) ◮ C-V simulations are in good agreement with the measured values and help us to understand and possibly optimize the devices ◮ I-V simulations were also performed (more details in the next slides) ◮ Good agreement on reverse currents and breakdown voltages ◮ FEI4 simulated current is lower than expected (grid issues? checking...) ◮ CMS diode simulations still running (bigger structure, more points) ◮ Thanks to the simulator is possible to better understand what is happening inside the devices Diode type I meas @10V I sim @10V V BD ( meas ) V BD ( sim ) [nA] [nA] [V] [V] 80BIG 6.53 4.39 51 48 FEI4 9.27 4.35 39.5 40 FEI4-FP 5.38 4.77 46 43 CMS 5.22 in progress 40 in progress 12 / 16 Povoli et al.

Selected simulation results - FE-4 diode (V B = − 35V) E-field Elec. Potential 1D slices Electric Field distribution High field at the N + /p-spray junction on the front Electrostatic potential ◮ side ( 2.65e5 V/cm ) P + column brings the bias voltage directly on the ◮ High field at the N + column/p-spray junction on ◮ front side p-spray the back side ( 2.48e5 V/cm ) ◮ Back side p-spray is also biased at high voltage ◮ E-field also increases under the front side metal (vertical and horizontal metal connections)