Digitally Assisted Analog Circuits Boris Murmann Stanford - PowerPoint PPT Presentation

Digitally Assisted Analog Circuits Boris Murmann Stanford University Department of Electrical Engineering murmann@stanford.edu

Outline • Motivation – Progress in digital circuits has outpaced performance growth in analog circuits by a large margin • Digitally Assisted A/D Converters – Using digital computing capabilities as a new driver to improve A/D converter energy efficiency – Examples • Experimental proof-of-concept result • Next generation designs • Conclusions Digitally Assisted Analog Circuits B. Murmann 2

Modern Electronic Circuits • Trend towards ubiquitous sensing, communication and computing – "Ambient Intelligence" • Signal processing predominantly done in digital domain – Rapidly improving digital capabilities, fueled by "Moore's Law" • Irreplaceable "bottleneck" - analog circuits – Analog-Digital Converters (ADCs) – Digital-Analog Converters (DACs) – Filters and amplifiers (Anti-aliasing, RF power amplification, …) • Focus of this talk: ADCs Digitally Assisted Analog Circuits B. Murmann 3

Issue 1: Throughput 10000 Relative Performance 1000 µ P MIPS (2x / 1.5 years) 150x 100 ADC* (2x / 4.7 years) 10 1 1987 1995 2003 15 years * Performance measure: Bandwidth x Number of quantization levels Digitally Assisted Analog Circuits B. Murmann 4

Issue 2: Power and Energy • Example: Cell phone – Battery has roughly 3Wh of Energy – For a talk time of 12 hours, can draw no more than 250mW – Only a fraction of that power available for ADC • In an increasing number of applications, key issue is how much performance you can squeeze into a fraction of 0.1…1Watt • What is the trend in ADC versus digital power/energy consumption? Digitally Assisted Analog Circuits B. Murmann 5

ADC Energy versus Digital Energy • Interesting metric to look at – How many digital gates can you toggle for the energy needed in one A/D conversion? • Example – Standard digital gates (NAND2) in 0.13mm CMOS consume about 6nW/Gate/MHz • Energy/Gate = 6fJ – State-of-the-art 10-bit ADC consumes 1mW/MSample/sec • Energy/Conversion = 1nJ – Energy equivalent number of gates • 1nJ/6fJ= 166,666 Digitally Assisted Analog Circuits B. Murmann 6

Impact of Technology Scaling 500,000 Energy Equivalent # of Gates ADC 400,000 Resolution: 6bits 300,000 8bits 10bits 200,000 12bits 14bits 100,000 16bits 0 0.8 0.6 0.4 0.2 0.0 Feature Size [ µ m] Digitally Assisted Analog Circuits B. Murmann 7

Observations • Energy equivalent number of gates per A/D conversion has gone through the roof • Reason – Digital circuits have scaled well with technology – Analog doesn't benefit quite as much from smaller features • Issues: Low supply voltage, low device gain, … • Key idea – Build "digitally assisted analog circuits" – Find a way to leverage digital processing capabilities to improve performance and lower power of analog circuits Digitally Assisted Analog Circuits B. Murmann 8

Analog Circuit Challenges Matching and linearity constraints are not fundamental Speed Precision Noise Matching Linearity Power Dissipation Digitally Assisted Analog Circuits B. Murmann 9

A New Generation of ADCs • Conventional ADC – Precisely linear D accurate mapping from input to V in output “Accurate” ADC – Relies on highly linear and well matched analog components • Digitally assisted D sloppy D accurate ADC V in – A "sloppy" one-to-one Low Complexity Digital “Sloppy” ADC Postprocessor mapper – Digital postprocessor estimates ADC errors and applies corrections Digitally Assisted Analog Circuits B. Murmann 10

Examples • Digitally assisted pipeline ADC – Murmann & Boser, ISSCC 2003 • Minimum complexity, ultra low energy pipeline ADC – Under development in my research group • ADC with embedded calibration for OFDM systems – Under development in my research group Digitally Assisted Analog Circuits B. Murmann 11

Pipeline ADC V in S/H STAGE 1 STAGE N-1 STAGE N R bits (e.g. R=1) V in V res � 2 R res - � V A/D D/A D D=0 D=1 V in • Bottleneck: Highly linear gain element Digitally Assisted Analog Circuits B. Murmann 12

Open-Loop Gain Element Conventional Precision Amplifier Open-Loop Amplifier + Lower Noise + Increased Signal Range + Lower Power + Faster – Nonlinear  Use DSP to linearize! Digitally Assisted Analog Circuits B. Murmann 13

Digital Nonlinearity Correction Analog Digital Nonlinearity Inverse Vin Dout Dout,corr Parameters Modulation System ID • Use digital system identification techniques to determine optimum post distortion function • Possible (and often necessary) to track correction parameters without interrupting normal ADC operation Digitally Assisted Analog Circuits B. Murmann 14

Experimental Verification LOGIC CLK REFERENCE PIPELINE AND BIAS BACKEND STAGE1 SHA • 12bit, 75MSamples/sec, 0.35µm, post-processor off chip • Based on commercial part (Analog Devices AD9235) Digitally Assisted Analog Circuits B. Murmann 15

Block Diagram ~8400 Gates (0.042mm 2 in 0.13 µ m) • Proof of concept design – Open-loop amplifier only in first, most critical stage • Judicious analog/digital co-design – Only two corretion parameters (linear and cubic amplifier error) Digitally Assisted Analog Circuits B. Murmann 16

Linearity Improvement 20 Post-Proc. OFF Post-Proc. ON 10 0 -10 -20 0 1000 2000 3000 4000 Code Digitally Assisted Analog Circuits B. Murmann 17

Amplifier Power 60 50 Power [mW] 40 -62% (33mW) 30 20 10 0 Commercial Part This Work (Precision Amplifier) (Simple Amplifier) Digitally Assisted Analog Circuits B. Murmann 18

Digital Post-Processor • 8400 Gates, 64 bytes RAM, 64kBit ROM • Place & Route in 0.35 µ m technology Area=1.4mm 2 (18%) Power=10.5mW (3.6%) 40 Power [mW] 30 Pipelined ADC 20 (7.9 mm 2 ) 10 0 Amplifier Post- Post-Processor Savings Processor Digitally Assisted Analog Circuits B. Murmann 19

Going Beyond a Proof of Concept • Proof-of-concept design showed that the idea of digital assistance works, but power savings were not "revolutionary" • As a more aggressive step, it is now interesting to explore the question: How many "analog" transistors do we really need? Digitally Assisted Analog Circuits B. Murmann 20

Minimalistic Pipeline ADC Stage � ✷ � 1 V in � ✶ C DAC � V res ✷ C L (next stage) � 2 � 1 � 1 V REFN,P V DAC • Use a single active device, operated like a charge pump to implement gain element • Highly energy efficient, low noise, … • Gain is imprecise and nonlinear, but post-processor can take care of that Digitally Assisted Analog Circuits B. Murmann 21

Simulated Energy/Conversion 1.E+06 1.E+05 Energy/Conversion [pJ] 1.E+04 1.E+03 1.E+02 Minimalistic Pipeline 1.E+01 I SSCC 1998-2005 Expon. (I SSCC 1998-2005) 1.E+00 30 40 50 60 70 80 90 100 110 SN(D)R [dB] • 9-bit, "minimalistic" pipeline ADC prototype in 90nm technology – Roughly 20,000 gates used for digital post-processing – Only 7pJ per conversion, ~50x below state-of the art Digitally Assisted Analog Circuits B. Murmann 22

Attributes (1) • At 10MSamples/s (~video-rate), this ADC consumes only 70 µ W • Can be powered from a 1cm 3 size battery for more than 1 year! – A state-of the art ADC will drain the battery within a few days… Digitally Assisted Analog Circuits B. Murmann 23

Attributes (2) An ❧ og O ♣ er ❛ tions ✭ 2 ♣ J ❉ igit ❧ Post ♣ rocessing ♣ J ❛ ✮ ❛ ✭ ✺ ✮ 29 ✪ ✼ 1 ✪ • Energy/conversion is dominated by digital post- processing • Great news! – Energy efficiency will improve further when design is scaled to 65nm, 45nm, … Digitally Assisted Analog Circuits B. Murmann 24

The Calibration Problem • The "sloppier" we make the analog portion of the ADC, the more parameters we need to estimate and track – Can become quite complex or even impossible without disturbing normal ADC operation • Idea: "System Embedded" postprocessing and calibration of ADC – Leverage redundancy and knowledge of certain input signal properties to estimate ADC errors – Re-use existing system resources for ADC calibration • Example: ADC for OFDM receivers Digitally Assisted Analog Circuits B. Murmann 25

Embedded ADC Calibration for OFDM error pilot FFT IFFT DAC Channel ADC DSP pilot f f • Communications protocol uses "pilot tones" to measure and equalize RF channel nonidealities • Why not use these pilots to "equalize" ADC? – Errors in pilot signals can be used to estimate correction parameters for sloppy ADC Digitally Assisted Analog Circuits B. Murmann 26

Typical Learning Curve ~100ms Digitally Assisted Analog Circuits B. Murmann 27