Differential VCO and Differential VCO and Frequency Tripler using SiGe SiGe Frequency Tripler using HBTs for the 24 GHz ISM Band for the 24 GHz ISM Band HBTs Mina Danesh*, Frank Gruson, Peter Abele, Hermann Schumacher * - Microwave Communications (Montreal, Canada) University of Ulm (Germany) 2003 RFIC Symposium June 9, 2003 Philadelphia, PA, USA RFIC 2003 Mina Danesh 1
Outline Outline Outline • Project overview • 8 GHz Differential VCO • Circuit Design • Measurement Results • Differential Frequency Tripler • Circuit Design • Measurement Results • VCO/Tripler MMIC • Measurement Results RFIC 2003 Mina Danesh 2
24 GHz ISM Band 24 GHz ISM Band Overview Overview • ISM Band: 24 - 24.25 GHz • Applications • Short-range wireless data link • Short range radar sensors (automotive) • Project goals • Low cost, reliable, fully integrated, energy efficient MMIC • Attractive SiGe technology (low-cost, high integration) • System Design Requirements • LO source to drive a mixer at 0-10 dBm LO power • LO tuning range >= 250 MHz • IF frequency range: 500 MHz to 1 GHz • FM / BPSK modulation � carrier phase noise: -80 dBc/Hz at 100 kHz RFIC 2003 Mina Danesh 3
LO Source Design LO Source Design Frequency source building block IC LO Vcont Frequency VCO Buffer tripler Frequency Upstream or Loop Phase divider (static + downstream filter detector programmable ) conversion • Differential design advantages: • Easier integration with frequency divider and Gilbert-type mixer • Better common-mode rejection • 2x maximum voltage swing • Reduced crosstalk & immunity from substrate • Higher differential Q if substrate loss dominates RFIC 2003 Mina Danesh 4
Atmel SiGe1 HBT Process SiGe1 HBT Process Atmel Initial SiGe1 Process: HBT (0.8 � m) technology 2 Al metal layers � f T = 30 GHz � BV ce0 = 6 V Nitride passivation layer oxide Metal2 1.5 � m HBTS Metal1 3.7 � m (selectively implanted collector ) � f T = 50 GHz Si substrate � BV ce0 = 3 V 300 � m 20 � -cm RFIC 2003 Mina Danesh 5
Differential VCO Circuit Differential VCO Circuit Design - - Schematic Schematic Design Vcc Ls Ls Vcc Vcc Vct Rcb Rcb Q3 Q4 Cn Cn Rf Rf Cv Cv Cf Cf Cb Cb Q6 Cbo Q5 Cbo OUT+ OUT- Q2 Q1 Reb Reb Rbb Rbb Vbb Vbb Iee Ree Emitter follower Emitter follower Differential VCO RFIC 2003 Mina Danesh 6
VCO Circuit Design - - Layout Layout VCO Circuit Design Differentially driven symmetric inductor P P Emitter Emitter G G follower follower Varactors S- S+ HBTS transistor pair G G Biasing 380 � � P 380 � � RFIC 2003 Mina Danesh 7
VCO Design – – Symmetric Symmetric VCO Design Inductor Inductor Layout generated by custom script RFIC 2003 Mina Danesh 8
VCO Design – – Symmetric Symmetric VCO Design Inductor Inductor Underpass in M1 M2 105 Port3 � � Zd = Z11 + Z22 – Z12 – Z21 w = 10 � � s = 3 � � N = 3 Port1 Port2 Q diff = Re[Zd] / Im[Zd] Reference: M. Danesh and J. R. Long, “Differentially Driven Symmetric Microstrip Inductors”, IEEE Trans. MTT , L ind = 0.8 nH (meas); 0.76 nH (sim) vol. MTT-50, no. 1, Part II, pp. 332-341, R dc � � � � � � � Jan. 2002. RFIC 2003 Mina Danesh 9
VCO Tuning Measurements VCO Tuning Measurements 40 MHz/V 160 MHz/V 270 MHz Vcc - vo RFIC 2003 Mina Danesh 10
VCO Phase Noise Results VCO Phase Noise Results -90 dBc/Hz @ 100 kHz RFIC 2003 Mina Danesh 11
VCO Performance Summary VCO Performance Summary •Frequency of operation: 4.4 dBm 7.95 – 7.75 GHz •Tuning voltage: 0 – 2.7V > - 30 dBc •Tuning sensitivity: 50 MHz/V •Output power: 4.4 dBm +/- 0.1 •Biasing voltage: 3.3V •Total current: 27 mA •Phase noise: -90 dBc/Hz @100 kHz •Harmonic rejection: > 30 dBc RFIC 2003 Mina Danesh 12
Frequency Tripler Design Frequency Tripler Design Vcc Ls Ls Cs Cs R= 30 � � GND Cb2 GND Cb2 380 OUT+ OUT- � � Cb1 Cb1 Pout+ Pout- Q2 Q1 IN- IN+ Rbb Rbb HBTS transistor pair Pin- Pin+ Iee Ree Vbb Vbb Characteristics : GND GND Biasing • Differential transistor pair Symmetric Inductor • high input voltage swing 150 � � w = 10 � � ; s = 3 � � • limiting amplifier Rdc � � � � � 2*Ls = 0.32 nH • square wave at output Q at 24 GHz = 13 • rich in odd harmonics RFIC 2003 Mina Danesh 13
Frequency Tripler Frequency Tripler Measurements Measurements Pin = 0 dBm RFIC 2003 Mina Danesh 14
Frequency Tripler Frequency Tripler Measurements Measurements RFIC 2003 Mina Danesh 15
Frequency Tripler Frequency Tripler Conversion Loss Conversion Loss I = 28 mA -9 dB V = 3.3 V DC pwr = 92.4mW RF-RF efficiency: 12% GaAs comparison: Optimal conversion loss of – 4 dB RFIC 2003 Mina Danesh 16
VCO/Tripler MMIC VCO/Tripler MMIC VCO inductor 600 � � Buffer Buffer VCO VCO o/p VCO o/p Tripler Tripler o/p Tripler o/p Tripler inductor 300 � � RFIC 2003 Mina Danesh 17
VCO / Tripler Results VCO / Tripler Results Frequency VCO output Tripler output (GHz) power (dBm) power (dBm) 7.82 / 7.81 0.5 / 2.6 -9 / -8.8 15.6 / 15.6 -33 / -32 -30 / -37 23.5 / 23.4 -34.5 / -33 -10 / -4 Values in italics indicate simulated results. Frequency tripler phase noise degradation ~ 20log(3) = 9.5 dB Measured spot phase noise @ 100 kHz ~ -80 dBc/Hz RFIC 2003 Mina Danesh 18
VCO / Tripler Tuning Range VCO / Tripler Tuning Range 100 MHz/V 420 MHz 270 MHz/V RFIC 2003 Mina Danesh 19
VCO- -Tripler LO Tripler LO VCO Performance Summary Performance Summary Frequency of operation 23.5 – 23.08 GHz Tuning voltage 0 – 2.5V Tuning sensitivity 100 - 270 MHz/V Output power -10 dBm +/- 1 dB Biasing voltage 3.3V Total current 55 mA Phase noise -80 dBc/Hz @100 kHz Even Harmonic rejection > 20 dBc RFIC 2003 Mina Danesh 20
Conclusion Conclusion • Integrated variable frequency source for the 24 GHz ISM Band • Taking advantage of differential circuits • Frequency tripler built in a SiGe process • Optimization of the VCO at a lower frequency • Overall frequency source performance enhancement • Feasibility of a low-cost solution RFIC 2003 Mina Danesh 21
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