Recent Research on Memristor Based Circuits Herbert H.C. Iu School - PowerPoint PPT Presentation

Recent Research on Memristor Based Circuits Herbert H.C. Iu School of Electrical, Electronic and Computer Engineering The University of Western Australia, Australia Presented by H. Iu December 2016 1

Contents  Research team  Introduction of memristor  Memristor based chaotic circuit  Universal mutator for transformations among memristor, memcapacitor and meminductor  Coupled memristors  Future work 2

Research team Power and Clean Energy (PACE) Research Group  Group Leaders – Prof Tyrone Fernando and Prof Herbert Iu  10 PhD students  Power Electronics, Nonlinear Systems, Smart Grid, Renewable Energy Systems etc …  1 Emeritus Professor 3

Research areas  Switching dc/dc converters  Power factor correction circuits  Renewable energy  Smart grid  Memristor based circuits 4

Memristor  What is a memristor?  It is the missing 4 th element postulated by L.O. Chua in 1971 [1].  Researchers in Hewlett-Packard announced a solid state implementation of memristors in 2008 [2]. [1] L.O. Chua, “Memristor - The missing circuit element,” IEEE Transactions on Circuit Theory , vol. 18, no. 5, pp. 507-519, 1971. [2] D.B. Strukov, G.S. Snider, G.R. Stewart and R.S. Williams, “The missing memristor found,” Nature , pp. 80-83, Mar. 2008. 5

The four elements in circuit theory  q =  i dt , where q is the charge   =  v dt , where  is the flux 6

Circuit theory of memristor 1. Charge-controlled memristor  v = M(q) i , where M(q)= d  /dq . M is called memristance. 2. Flux-controlled memristor  i = W(  ) v , where W(  )= dq/d  . W is called memductance. 7

How memristance works? [3] R.S. Williams, “How we found the missing memristor,” IEEE Spectrum, pp. 29-35, Dec 2008. 8

How memristance works? [3] R.S. Williams, “How we found the missing memristor,” IEEE Spectrum, pp. 29-35, Dec 2008. 9

A HP memristor w V doped undoped D  HP memristor is in the form of a partially doped TiO 2 thin film with platinum electrodes.  M(w)= R ON ( w(t)/D ) + R OFF ( 1- w(t)/D ) , w(t)=  v ( R ON /D ) q(t), where D is the total width of TiO 2 film, w(t) is the width of the region of high dopant concentration on the film, R OFF and R ON are the limit values of the memristance for w(t) =0 and w(t) = D ,  v is the dopant mobility. 10

Fingerprint -Pinched hysteresis loop 10 0.6 Change 0.4 5 0.2 Current(×10-3) 0.0 50 Flux 10 ω 0 0 -5 ω 0 - 10 -1.0 -0.5 0.0 0.5 1.0 Voltage 11

Classification [4] L. O. Chua, “Everything you wished to know about memristors but are afraid to ask,” Radio Engineering , June 2015. 1. Ideal memristor 2. Generic memristor 3. Extended memristor 12

Ideal memristor Current-controlled  v = M(q) i; dq/dt = i. Voltage-controlled  i = W(  ) v; d  /dt = v. 13

Generic memristor Current-controlled  v = M ( x ) i; d x /dt = f ( x ,i ). Voltage-controlled  i = W ( x ) v; d x /dt = g ( x ,v ) . 14

Extended memristor Current-controlled  v = M ( x , i ) i ; M ( x ,0)   ; d x /dt = f ( x ,i ). Voltage-controlled  i = W ( x , v ) v; W ( x ,0)   ; d x /dt = g ( x ,v ) . 15

Motivation  Memristor will have a lot of potential applications, and some of them will be related to nonlinear dynamics.  The characteristics and dynamical behaviour of memristor based systems should be studied in detail.  Recent studies show that memristor can play a major role in nonlinear systems. 16

Memristor based chaotic circuit [5] H.H.C. Iu et al ., “Controlling chaos in a memristor based circuit using twin - t notch filter,” IEEE Transactions on Circuits and Systems Part I, vol. 58, no. 6, pp. 1337-1344, 2011.   d ( ) t    ( ) v t  1 dt    dv t ( ) 1 ( v t ( ) v t ( )    1 2 1 W ( ( )) ( )) t v t  1  R i dt C R 1 L   dv t ( ) 1 ( v t ( ) v t ( )  L v   v C C 2 1 2 i t ( )) 2 1 2 1  L dt C R  2  di t ( ) v t ( )  L 2   dt L φ (t) denotes the magnetic flux between two terminals of a memristor, assume q = a  +b φ 3      W ( φ ( t )) is the memductance function, 2 W ( ( )) t a 3 b ( ) t  17

Simulation parameters 18

Phase portraits  Chaotic state R =1800 Ω  Periodic state R =1600 Ω 19

Power spectrum diagrams  Chaotic state  Periodic state 20

Bifurcation diagrams  Phi vs R  v 1 vs R 21

Twin-T notch filter R R v n n t 1 ( ) n ( ) v t in ( ) v t o C C v 2 ( ) t n n n R q 1 1 R 2 C n n 2 R q 2        2 dv ( ) t dv ( ) t 0.5 v ( ) t (2 q 2 q 0.5) v t ( ) (2 q 1) v ( ) t 2 qv ( ) t    n 1 in in o n 1 n 2 q dt dt R C  n n     dv ( ) t dv ( ) t 2 v ( ) t (2 q 1) v t ( ) v ( ) t    n 2 in n 2 o n 1  dt dt R C n n     ( ) ( ) 2 ( ) 2( 1) ( ) 2 ( ) dv t dv t v t q v t v t    o in n 2 o n 1  dt dt R C n n 22

Input-output transfer function 1  2 s 2 2 V s ( ) R C   o n n F s ( ) 4 1 V ( ) s    2 s (1 q s ) in 2 2 R C R C n n n n 23

Schematic of the MCC with notch filter controller R 1 R R n n R 1 R 3 C C n n R 1 q 1 R 2 C n n 2 R 3 i t ( ) o R q 2 i R L L v v C C 2 1 2 1 24

Experimental prototype 25

Results of notch filter control 26

Experimental results- phase portraits  v 2 vs phi  v 2 vs v 1 27

Experimental results- power spectrum  Before connection - Chaotic state  After connection - Periodic state 28

Memristor emulator [6] D.S. Yu, H.H.C. Iu et al ., “A floating memristor emulator based relaxation oscillator” IEEE Transactions on Circuits and Systems Part I, vol. 61, no. 10, pp. 2888-2896, 2014. i AD633 MR v y y p z x A w 1 w i x Emulator consists of 4 current conveyors, 1 op  2 2 R x z x y 8 z U2 1 amp, 1 multiplier, 1 capacitor and several resistors. y U1 R i 2 U6 9 1 R v 4 AB R R v 10 3 y1 v R R   r10  6 7 R R ( R ) R 1 R y x x     p   4 8 9 7 7 i v v v i R s MR AB AB s   5 10 R R R R R C R MR y z B z 3 8 10 5 3 1 6 U5 v U4 c1 U3 C 1 W ( φ ( t )) is the memductance.  6   17.6Hz W      4 AB AB 2       v r10 (V) R R R R R R R R 0   120Hz   4 7 8 9 4 7 8 9 = v , s 10 R R R R 2 10 R R C R R -2 3 6 8 10 3 5 1 8 10 -4 35.4Hz -6 -2 -1 0 1 2 v AB ( V) 29

Serial and Parallel Connections 0.30 A i Parallel MR W 0.25 0.2 Parallel Memductance (mS) W 0.20 i MR (mA) W W 0.0 0.15 B Serial 0.10 Serial i Serial MR A -0.2 0.05 W W B 0.90 0.92 0.94 0.96 0.98 1.00 Parallel t ( s) -2 -1 0 1 2 v AB (V) 30

Introduction of Memcapacitor [7] M. Di Ventra, Y. V. Pershin, and L. O. Chua, “Circuit elements with memory: memristors, memcapacitors and meminductors,” Proc. IEEE , vol. 97, no. 10, pp. 1717 – 1724, Oct. 2009. 31

Introduction of Meminductor  I 32

A Universal Mutator [8] D.S. Yu, Y. Liang, H.H.C. Iu and L.O. Chua, “A Universal Mutator for Transformations among Memristor, Memcapacitor and Meminductor ,” IEEE Transactions on Circuits and Systems Part II, vol. 61, no. 10, pp. 758-762, 2014.  Mutator consists of 3 common v y p A z 2 z +1 transimpedance operational x U2 i amplifiers (TOAs) C E 2 3 4  Position 4 is used for memory v F D elements. U3 x z z p  Positions 1, 2, 3 and 5 contain only +1 +1 y x y p U1 resistors or capacitors. v 1 5 3 z B 33

Case study: MR to MC  At position 4, v y     p A z 2 z G +1 m MR x U2 i MC C G R m R 2 3 D v MC  From terminal AB, U3 x z z p +1 +1 y x y p C m = G m C 1 R 3 R 5 / R 2 U1 C v R 1 3 z 5 B 34

MR to MC : Experimental Results 6 5 27.5Hz 27.5Hz 4 C m =3.95  F 52.9Hz 4 2 C m (  F) q MC (uC) 3 0 38.6Hz 2 -2 C m =1.64  F 38.6Hz -4 1 52.9Hz -6 -2 -1 0 1 2 v MC ( V) -1 0 1 v MC ( V) Measured pinched hysteretic loops Variation curve of C m along with terminal voltages 35

Summary of Transformations v y p A z 2 z +1 x U2 i C E 2 4 3 v F D U3 x z z p +1 +1 y x y p U1 v 1 5 3 z B 36

Coupled Memristors [9] D.S. Yu, H.H.C. Iu, Y. Liang, T. Fernando and L.O. Chua, “Dynamic Behavior of Coupled Memristor Circuits,” IEEE Transactions on Circuits and Systems Part I , vol. 62, no. 6, pp. 1607-1616, June 2015. A flux controlled and coupled ideal Flux controlled memristor model: MR system:    i t ( ) W ( , ) ( ) v t   1 1 1 2 1 i t ( ) W ( ) ( ) v t    ( ) ( , ) ( ) i t W v t  2 2 1 2 2 dq ( )   W ( )    d d 1 v t 1 ( ) dt W      ( )   d 2 v t 2 ( ) dt 37