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ZSim Tutorial MICRO 2015 S TATS AND C ONFIGURATION Core Models Po-An Tsai Outline 2 Outline 2 ZSim core simulation techniques Outline 2 ZSim core simulation techniques ZSim core structure I1D I1I Simple IPC 1 core


  1. Timing Core 12 Current cycle = 0 mov (%rbp),%rcx I1D I1I Current cycle = l1d->load(curCycle) Load(%rbp) add %rax,%rbx mov %rdx,(%rbp) Current cycle = l1d->store(curCycle) Store(%rbp) IPC1 Core ja 40530a Miss Write back Request from core Tag Acc Mem Data Read Response to core Data Write

  2. Timing Core 12 Current cycle = 0 mov (%rbp),%rcx I1D I1I Current cycle = l1d->load(curCycle) Load(%rbp) add %rax,%rbx mov %rdx,(%rbp) Current cycle = l1d->store(curCycle) Store(%rbp) IPC1 Core ja 40530a Miss Request Write from core Tag back Acc Request from core Tag Data Acc Write Mem Data Read Response to core Data Write

  3. Timing Core 12 Current cycle = 0 mov (%rbp),%rcx I1D I1I Current cycle = l1d->load(curCycle) Load(%rbp) add %rax,%rbx mov %rdx,(%rbp) Current cycle = l1d->store(curCycle) Store(%rbp) IPC1 Core BasicBlock(BblDescriptor) ja 40530a Miss Request Write from core Tag back Acc Request from core Tag Data Acc Write Mem Data Read Response to core Data Write

  4. Timing Core 12 Current cycle = 0 mov (%rbp),%rcx I1D I1I Current cycle = l1d->load(curCycle) Load(%rbp) add %rax,%rbx mov %rdx,(%rbp) Current cycle = l1d->store(curCycle) Store(%rbp) IPC1 Core BasicBlock(BblDescriptor) Current cycle += 4 ja 40530a Miss Request Write from core Tag back Acc Request from core Tag Data Acc Write Mem Data Read Response to core Data Write

  5. OOO Core - BBL 13  Simulate all stages at once Load A Exec Store A Exec

  6. OOO Core - BBL 13  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  7. OOO Core - BBL 14  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  8. OOO Core - BBL 15  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  9. OOO Core - BBL 15  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  10. OOO Core - BBL 15  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  11. OOO Core - BBL 15  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  12. OOO Core - BBL 15  Simulate all stages at once Load A Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  13. OOO Core - BBL 15  Simulate all stages at once Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  14. OOO Core - BBL 15  Simulate all stages at once Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  15. OOO Core - BBL 15  Simulate all stages at once Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  16. OOO Core - BBL 15  Simulate all stages at once Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  17. OOO Core - BBL 15  Simulate all stages at once Exec Store A Exec Fetch Decode Issue OOO Commit Execute

  18. OOO Core - BBL 15  Simulate all stages at once Store A Exec Fetch Decode Issue OOO Commit Execute

  19. OOO Core - BBL 16  Simulate all stages at once Load A Fetch Decode Issue OOO Commit Execute

  20. OOO Core - BBL 17  Simulate all stages at once Load A Fetch cycle Fetch Decode Issue OOO Commit Execute Miss prediction Fetch wrong ins Ins Fetch Fetch whole bbl Adjust Fetch clock

  21. OOO Core - BBL 18  Simulate all stages at once Load A Decode cycle Fetch Decode Issue OOO Commit Execute uop Queue Miss prediction Check next available Fetch cycle wrong ins Ins Fetch Fetch whole bbl Adjust Adjust Fetch clock Decode clock

  22. OOO Core - BBL 19  Simulate all stages at once Load A Dispatch cycle Fetch Decode Issue OOO Commit Reg Scoreboard Execute uop Queue Miss prediction Check src Check next available available Fetch cycle cycle wrong ins Rob Ins Fetch Check next avail cycle Fetch Issue width whole bbl RegFile width Adjust Adjust Adjust issue clock Fetch clock Decode clock

  23. OOO Core - BBL 20  Simulate all stages at once Load A Commit cycle Fetch Decode Issue OOO Commit Reg Scoreboard Execute uop Queue Miss prediction Check src Ins Window Check next available available Fetch Schedule cycle cycle wrong ins uop in the Rob next cycle Ins Fetch Check next that needed avail cycle ports avail Fetch Issue width whole bbl LS Unit* RegFile width Issue Adjust Adjust Adjust Adjust Load/Store issue clock issue clock Fetch clock Decode clock *Only for load/store

  24. OOO Core - BBL 21  Simulate all stages at once Load A Fetch Decode Issue OOO Commit Reg Scoreboard Execute uop Queue Reg Scoreboard Miss prediction Check src Ins Window Check next Set dst available available available Fetch Schedule cycle cycle cycle wrong ins uop in the Rob next cycle Rob Ins Fetch Check next that needed Retire uop avail cycle ports avail Fetch considering Issue width whole bbl rob width LS Unit* RegFile width Issue Adjust Adjust Adjust Adjust Adjust Load/Store retire clock issue clock issue clock Fetch clock Decode clock

  25. OOO Core – Load/Store 22 Simulate MLP Load A Load B

  26. OOO Core – Load/Store 22 Simulate MLP Load A Load B Cache Hit @ 50 Dispatch @ 40 Issue A Response @ 30 @ 70

  27. OOO Core – Load/Store 23 Mem Mem Read WB @ 90 @ 110 Simulate MLP Cache Load A Cache Miss Write Load B Cache @ 70 @ 100 Hit @ 50 Dispatch @ 60 Dispatch @ 40 Issue B Response Issue A Response @ 50 @ 110 @ 30 @ 70

  28. OOO Core – Load/Store 23 Mem Mem Read WB @ 90 @ 110 Simulate MLP Cache Load A Cache Miss Write Load B Cache @ 70 @ 100 Hit @ 50 Dispatch @ 60 Dispatch @ 40 Issue B Response Issue A Response @ 50 @ 110 @ 30 @ 70 In weave phase, request B will not be delayed due to contentions for A

  29. Simulation Speed for Different Core Type 24  SPECCPU 2006 suite

  30. Simulation Speed for Different Core Type 24  SPECCPU 2006 suite ~3X difference between IPC1 and OOO-C in Hmean

  31. Not Modeled Core Behaviors 25

  32. Not Modeled Core Behaviors 25  Wrong path execution  Hard to simulate for Pin  Okay to skip for Westmere

  33. Not Modeled Core Behaviors 25  Wrong path execution  Hard to simulate for Pin  Okay to skip for Westmere  Fine-grained message-passing  Need significant changes

  34. Not Modeled Core Behaviors 25  Wrong path execution  Hard to simulate for Pin  Okay to skip for Westmere  Fine-grained message-passing  Need significant changes  TLBs and SMT  Not supported yet

  35. Coding Examples 26

  36. Coding Examples 26  Implement a branch predictor for OOO core

  37. Coding Examples 26  Implement a branch predictor for OOO core  Change OOO core type  From Westmere to Silvermont

  38. Implement Branch Predictors 27

  39. Implement Branch Predictors 27  Have a new branch predictor class

  40. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor {

  41. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }

  42. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method

  43. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) {

  44. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) { bool prediction = (taken == lastSeen);

  45. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) { bool prediction = (taken == lastSeen); lastSeen = taken;

  46. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) { bool prediction = (taken == lastSeen); lastSeen = taken; return prediction; // always predict taken }

  47. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) { bool prediction = (taken == lastSeen); lastSeen = taken; return prediction; // always predict taken }  Replace the branch predictor in ooo_core.h

  48. Implement Branch Predictors 27  Have a new branch predictor class class GShareBranchPredictor { private: bool lastSeen; …… }  Implement the predict method public: // Predicts and updates; returns false if mispredicted inline bool predict(Address branchPc, bool taken) { bool prediction = (taken == lastSeen); lastSeen = taken; return prediction; // always predict taken }  Replace the branch predictor in ooo_core.h //BranchPredictorPAg<11, 18, 14> branchPred; GSharePredictor branchPred;

  49. Demo 28

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