Mixed-Signal VLSI Design Course Code: EE719/EE410 Department: - PowerPoint PPT Presentation

Mixed-Signal VLSI Design Course Code: EE719/EE410 Department: Electrical Engineering Semester: Spring 2011 Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in 1

2 2 Date: Jan. 05, 2011 Date: Jan. 05, 2011 Introduction Introduction  Prerequisite  Content of the course  References  CAD Tools and Technology  Learning and Grading  CDEEP-related points  Introduction to the course  Introduction to modern network synthesis theory IIT-Bombay Lecture 1 M. Shojaei Baghini

3 3  Prerequisite: CMOS Analog VLSI Design (EE618) or Simultaneously IIT-Bombay Lecture 1 M. Shojaei Baghini

4 4 Content of the Course  Continuous-time filters (review)  Discrete-time filters  Basics of Analog to digital converters (ADC)  Basics of Digital to analog converters (DAC) Parallel ADCs (Flash ADC), Pipelined ADCs  DACs  Algorithmic ADCs (SAR, ...) IIT-Bombay Lecture 1 M. Shojaei Baghini

5 5 Content of the Course (cont'd)  Time Interleaved ADCs  Oversampled ADCs • Mixed-Signal layout • Analog and Mixed-Signal IC Test • Interconnects • Delay locked loops and Phase locked loops IIT-Bombay Lecture 1 M. Shojaei Baghini

6 6 References 1) CMOS mixed-signal circuit design by R. Jacob Baker, Wiley India, IEEE press, reprint 2008. 2) Design of analog CMOS integrated circuits by Behzad Razavi, McGraw-Hill, 2003. 3) CMOS circuit design, layout and simulation by R. Jacob Baker, Revised second edition, IEEE press, 2008. 4) CMOS Integrated ADCs and DACs by Rudy V. de Plassche, Springer, Indian edition, 2005. IIT-Bombay Lecture 1 M. Shojaei Baghini

7 7 Additional References 5) Electronic Filter Design Handbook by Arthur B. Williams, McGraw-Hill, 1981. 6) Design of analog filters by R. Schauman, Prentice-Hall 1990 (or newer additions) 7) An introduction to mixed-signal IC test and measurement by M. Burns et al., Oxford university press, first Indian edition, 2008. 8) Relevant published papers (will be specified) IIT-Bombay Lecture 1 M. Shojaei Baghini

8 8 CAD Tools and Technology - Mentor Graphics Custom IC Design Flow Tool Set or Cadence Custom IC Design flow Tool Set - Cadence ASIC Design Flow (will be decided) - 0.18um UMC CMOS process IIT-Bombay Lecture 1 M. Shojaei Baghini

9 9 Learning and Grading  Course projects/quizzes 30%, Midterm 30% ,  Final exam 40%.  There is no late submission :)  Office hours: Mondays: 12:00pm to 1:pm and interactions through Moodle  Surprise quize!  Moodle as the main website for the course (supported by CDEEP)  EE Course website for grading IIT-Bombay Lecture 1 M. Shojaei Baghini

10 10 CDEEP-Related Points - I will repeat your questions. - I will write with large font size. - You will inform me if camera is switched to PC while it should show the paper slides and vice versa. IIT-Bombay Lecture 1 M. Shojaei Baghini

11 11 Introduction to Modern Introduction to Modern Network Synthesis Theory Network Synthesis Theory Contents Contents • Properties of driving point impedance (Z in ) in RLC networks IIT-Bombay Lecture 1 M. Shojaei Baghini

12 12 Driving Point Impedance (Z in ) Driving Point Impedance (Z in ) of RLC Networks of RLC Networks An example of RLC network: Lossless 2-port terminated by load resistance R2 IIT-Bombay Lecture 1 M. Shojaei Baghini

13 13 Properties of Z in (s) in RLC Properties of Z in (s) in RLC Networks Networks Z in (s) is a positive real function. Z in (s) is a positive real function. Properties of Zin(s) Properties of Zin(s) • Z in (s) is a rational function of s . • If s is real Z in (s) is also real. • Re[s] ≥ 0 ⇒Re[Z in (s)]≥0. IIT-Bombay Lecture 1 M. Shojaei Baghini

14 14 Properties of Z in (s) in RLC Properties of Z in (s) in RLC Networks (cont'd) Networks (cont'd) • For Z in (s) order of the numerator polynomial differs from order of the denominator polynomial at most by unity. • For a positive real Z in (s), poles and zeros of Z in (s) are placed on or on the left side of “j ω ” axis. Imaginary poles are simple with positive real residues. Further Re [Z in (j ω )] ≥0 for all values of ω . 14 IIT-Bombay Lecture 1 M. Shojaei Baghini

15 15 Properties of Z in (s) in RLC Properties of Z in (s) in RLC Networks - Example Networks - Example • Zin(s) is a rational function of s . • Order of denominator = 3 • Order of numerator = 4 • Poles with negative or zero real part 15 IIT-Bombay Lecture 1 M. Shojaei Baghini

16 16 Basic Concepts Basic Concepts • Dynamic range • Phase Delay • Group Delay • Minimum Phase TF 16 IIT-Bombay Lecture 1 M. Shojaei Baghini

17 17 End of Lecture 1 IIT-Bombay Lecture 1 M. Shojaei Baghini