Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical - PowerPoint PPT Presentation

Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical Engineering Lecture 14: February 05, 2018 Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in 1

2 2 Module 18 Sample & Hold Circuit with Buffer Reference Chapter: Introduction to Switched capacitor Circuits Design of Analog CMOS Integrated Circuits, by Behzad Razavi Second edition, 2017 IIT-Bombay Lecture 14 M. Shojaei Baghini

3 3 Unity Gain Sampling with Buffer Advantage of op-amp • Sensitive to charge injection • IIT-Bombay Lecture 14 M. Shojaei Baghini

4 4 Unity Gain Sample & Hold Circuit with Buffer and Switching at Node X Flip Around T&H 1. S2 turns off. 2. S1 turns off. 3. S3 turns on. What about the order for the next phase? How do you compare your answer with the example given in Razavi’s book chapter? IIT-Bombay Lecture 14 M. Shojaei Baghini

5 5 Unity Gain Sample & Hold Circuit with Buffer and Switching at Node X Sample Hold IIT-Bombay Lecture 14 M. Shojaei Baghini

6 6 Discrete Time Unity Gain Sampler with Switching at Node X Notice: Insensitive Circuit with Respect to the Injected Charge from S 1 and Stray Capacitor at Node X (I) Why is the circuit insensitive to Δq 1 ? (III) - + - + (II) IIT-Bombay Lecture 14 M. Shojaei Baghini

7 7 Differential Architecture: No Differential-mode Charge Injection from S 2 to C H S eq turns off slightly after S 2 and S 2 ’, and, before S 1 and S 1 ’. IIT-Bombay Lecture 14 M. Shojaei Baghini

8 8 Module 19 Introduction to Discrete Time Amplifiers Reference Chapter: Introduction to Switched capacitor Circuits Design of Analog CMOS Integrated Circuits, by Behzad Razavi Second edition, 2017 IIT-Bombay Lecture 14 M. Shojaei Baghini

9 9 Discrete Time Amplifier - Introduction Continuous time operation • No DC loading • No resistive element and hence no RC variation issue. • Potential to be converted to a track & hold circuit • Advantage of using op-amp? • IIT-Bombay Lecture 14 M. Shojaei Baghini

10 10 Discrete Time Amplifier (Embedded T&H ) with Bottom Plate Switching - Example S1 and S2 are closed: Sample S3 is closed: Amplify and Hold IIT-Bombay Lecture 14 M. Shojaei Baghini

11 11 Discrete Time Amplifier (Embedded T&H ) with Bottom Plate Switching – No Effect of Charge Injection from S 1 (due to charge injection) IIT-Bombay Lecture 14 M. Shojaei Baghini

12 12 End of Lecture 14 IIT-Bombay Lecture 14 M. Shojaei Baghini