Development of ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC Maximilian Hils, on behalf of the ATLAS Liquid Argon Calorimeter Group Institut für Kern- und Teilchenphysik, Technische Universität Dresden May 24, 2017 Technology and Instrumentation in Particle Physics 2017, Beijing, China 1/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Large Hadron Collider Proton-proton collisions with √ s = 14 TeV at a rate of 40 MHz About 10 11 protons per bunch resulting in a design luminosity of 10 34 cm − 2 s − 1 2/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
ATLAS Detector 3/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
ATLAS Liquid Argon Calorimeter Sampling calorimeter (absorber: Pb, Cu, W; active: LAr) 182 468 detector cells arranged in layers 4/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
HL-LHC Upgrade Plans Right now, the mean number of p-p collisions per bunch crossing is 20 After the phase-2 upgrade (2024–26), up to 200 expected 5/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Performance Requirements on the Readout Electronics Currently installed readout is not ready for HL-LHC Large number of pile-up events will challenge the trigger system Hardware trigger rate up to 1 MHz 60 µs data buffering Currently installed front-end electronics cannot provide that All 1524 front-end boards and the back-end electronics need to be replaced 6/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Upgrade of Readout Electronics 7/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Upgrade of Readout Electronics 7/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Upgrade of Readout Electronics 7/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Specifications for the Front-end Electronics Preamplifiers have a finite dynamic range [30 MeV-4 GeV] Lineary of 0 . 1 % for energies up to 10 % of the dynamic range required Noise level below intrinsic calorimeter resolution Either two gains with 14-bit ADCs or three with 12-bit ADCs 2 10 (E)/E [%] 10 σ 1 -1 10 -2 10 10%/ E/GeV 0.2% ⊕ 14 bit range and 12 bit resolution; gain = x1/x30 12 bit range and resolution; gain = x1/x5/x50 -3 10 -2 -1 2 3 4 10 10 1 10 10 10 10 Energy [GeV] 8/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Preamplifier & shaper Preamplifier and shaper will be implemented in a single ASIC Low noise required Low power required Fully‐Differential Amplifier with Passive Feedback Two R&Ds paths on-going: R 65 nm CMOS, test chips submitted April 2017 v i = ‐v o /N ‐ v o + 130 nm CMOS, tests chips i i i nR + ‐ ‐v o submitted September 2016 C ‐v o /N • R‐noise 4kT/R C∙(N‐1) The 65 nm CMOS is a fully • Input impedance +R/(N+1) positive positive differential preamplifier • Fully‐differential output Figure: Post-layout simulations and architecture view of the 65 nm ASIC 9/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Preamplifier & shaper: 130 nm Prototype New electronically cooled preamp design Linearity ∼ 0 . 1 %, within 1 % up to 7 mA In general, good agreement with simulations, except noise Issue understood, new prototype in 2017 10/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Analog-to-digital Converter Commercial and custom solutions ADC needs to be interfaced to CERN lpGBT serializer Custom design in 65 nm of a 14-bit ADC: 12-bit Successive Approximation Register (SAR) and Dynamic Range Enhancer (DRE) 11/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Analog-to-digital Converter Commercial off-the-shelf (COTS) ADCs: Twenty 14-bit and seven 16-bit ADCs reviewed 16-bit candidate ADCs identified (based on performance and cost) Irradiation tests planned for 2017 12/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Back-end Electronics About 35 000 optical links from the front-end Input data rate of 275 Tbps About 400 high-performance FPGAs are needed FELIX / DAQ TTC L0A/ fragment builder L1A raw data precision FEX data L0 data buffer data buffer buffer buffer gain sel. configurable input stage remapping FEXes front-end energy pulse summing processing summing L0Global energy data controller reduction 13/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
ATLAS Readout Electronics Upgrade Simulation Optimization of the readout chain with AREUS Comparison of e.g. deposited and reconstructed energies 3 1 [GeV] Relative Frequency / 0.5 GeV / 0.0 GeV Absolute Error Correlation s = 14TeV, EM Middle, OF , Electrons − 1 2 10 Max Depo T,EC - E − 2 1 10 Reco T,EC E − 3 0 10 − − 4 1 10 − − 5 2 10 − − 6 3 10 0 10 20 30 40 50 60 70 Depo E [GeV] T,EC 14/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Summary Front-end and back-end electronics need to be replaced due to higher pile-up Investigating different architectures for the preamplifier & shaper, test chips already submitted Studies of custom and commercial ADC designs Simulation studies for the readout electronics on-going 15/15 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Backup Radiation tolerance requirements for the front-end electronics 1/2 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
Backup AREUS EMB Middle Layer ( η =0.0125) electronics noise 10 2 EMB Middle Layer ( =0.0125) pulse shapes 0.15 10 0 E T = 100.0 GeV E T = 200.0 GeV 10 -2 E T = 400.0 GeV 0.10 10 -4 Power [nV²/Hz] 0.05 Voltage [V] 10 -6 10 -8 0.00 10 -10 Preamp = 50 HG 0.05 τ shape = 13 ns 10 -12 Preamp = 50 HG σ RMS = 24.0 µV τ shape = 13 ns 10 -14 0.10 10 4 10 5 10 6 10 7 10 8 10 9 10 10 0 100 200 300 400 500 600 700 Time [ns] Frequency [Hz] 2/2 Maximilian Hils ATLAS LAr Calorimeter Readout Electronics for the HL-LHC
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