intro to focused ion beam fib chip circuit edit
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Intro to Focused Ion Beam (FIB) Chip Circuit Edit Chris Kang - PowerPoint PPT Presentation

Fab 10 Laboratory Analysis Services Intro to Focused Ion Beam (FIB) Chip Circuit Edit Chris Kang (Presenting) Steve Herschbein, Carmelo Scrudato, George Worth & Edward Hermann Mgr: Ray Wagner FIB-SEM Workshop Laurel, MD 2/19/2016 Why


  1. Fab 10 Laboratory Analysis Services Intro to Focused Ion Beam (FIB) Chip Circuit Edit Chris Kang (Presenting) Steve Herschbein, Carmelo Scrudato, George Worth & Edward Hermann Mgr: Ray Wagner FIB-SEM Workshop Laurel, MD 2/19/2016

  2. Why an “Intro” Talk to This Audience?  Educational: Some of you aren’t familiar with this application.  Self-serving! We need your help …  Microchip process technology is moving faster than advances in FIB tools, process gases, and sample prep.  Tool platforms, columns & ion species, e-beam, gas chemistry & delivery, in-situ light optics, navigation & automation (remove the human factor), damage anneal, 3D sample prep, etc. – All are in need of improvement and investment! 2

  3. Intro to Focused Ion Beam (FIB) Editing  FIB Chip Editing / FIB Circuit Modification / FIB Microsurgery  Most people in typical analysis fields deal with “dead things”. Even the biologists… If it isn’t dead when it arrives, it soon will be…  By contrast, we are asked to do brain surgery on “live patients”.  With up to 5 Billion transistors, will a design be ‘first time right’??  New masks & a wafer Fab run to test a theory can take months. Is there a better way to model a change, before making a change? 3

  4. Why Perform FIB Chip Edit?  FIB circuit editing is used to produce a limited number of hand-built prototype devices that will roughly mimic what a mask change would accomplish.  Concept to first working parts in 1- 2 weeks, versus up to 3 months by new masks and a Fab turn.  Used to insure that the proposed change will indeed fix the issue, that the identified design deficiency is the one & only, and allows software development or hardware demonstrations to remain on schedule. It can have a major impact on Time-to-Market.  Prototyping is also commonly used by the Development, Yield, Test, and the Failure Analysis Community to better understand the physical layout, design manual vs. speed sort anomalies, test coverage assurance, defect site isolation, high speed TX/RX tuning, etc. 4

  5. Chip Edit Origin: The “Yellow Wire” EC Simple “yellow wire” edit on a two layer Cut PC board. Board features fully visible, no blind navigation required. Solder in yellow wire jumpers, scratch out Connect unwanted Cu traces. 5

  6. Basic Frontside FIB Edit Simple “yellow wire” edit on a two layer metal process. Cut Chip features fully visible, no blind navigation required. FIB Process: Mill vias to metal lines & add jumper straps, mill 3 cuts. Connect 6

  7. Chip Edit Tool Basics: What is a FIB? A Chip Edit FIB is a “direct write” Ion tool, a whole Fab in a box… column Imaging / Litho / Implant / Etch / Deposition Ion beam Ga + (2-50 keV)  Like an SEM, but primary beam is traditionally Ga + (30 keV typical). Tunable  Use beam to sputter, with image Gas Jets created by collecting secondary Secondary electrons or ions. electrons  Utilize transferred energy to Secondary activate precursor gases for ions selective etch, or deposition of conductors & insulators.  Perform high volume or precision Sample nanoscale materials modification. 7

  8. Features Specific to a Chip Edit Tool  Sophisticated gas delivery system Variety of gas precursors Motor driven precision placement nozzles Mass flow controllers & mixing manifold Special high volume XeF2 nozzle - gas concentration (some tools)  In-Situ Optical System 100x FOV IR (thru silicon) &/or broadband imaging  CAD Navigation Overlay & Local Coordinate Lock Files Camelot / GDS / Oasis / Chipview / others  High Precision Stages Laser tracked or tight tolerance with correction mapping  Leading Edge Ion Columns High current, gas immune, high resolution Precise pattern generation & landing energy control Future: SEM column for non-destructive imaging & gas processing Future: Alternate ion species – select by mass, conductivity, etc. 8

  9. Example of Drill & Fill – Create a New Via XeF 2 gas assisted FIB mill of a new contact via, then filled with tungsten metal. This could be an M7 access point for an M6 internal electrical M5 analysis, or a step in a functional circuitry M4 M4 change. M3 M2 M2 9

  10. Dynamic Shape Changes During Si Thinning Chip-Package Z Interaction! Y X IR monitoring for thickness Delidded Module: 100um+ Bowing As Received: Packaged Module Center of chip is thinner than perimeter due to board-dominated CTE stress. Reflectance metrology thickness mapping generates corrected mill contour map for next round of shaping – down to 10 um remaining . 10

  11. FIB Backside Chip Circuit Edit Process Backside Edit Plan: Cut at the M1- M2 contacts, connect M1 latch input to Vdd. M2 = Blue, M1 = Red, Poly = Green, S-D = Pink 11

  12. FIB Backside Chip Circuit Edit (Bulk) CAD Layout vs. FIB Image upon Touchdown: Make access points for cut & contacts: 12

  13. FIB Backside Chip Circuit Edit (Bulk) Insulate, connect the wires & cover the cut: 13

  14. Typical FIB Edit Request Format  Request to remove a pair of spurious inverters 14

  15. Alternate to typical “Wiring EC Edit” Method  Option 1: Cut M2 & M3 wiring as per customer request.  Option 2: Delete the dangling devices by milling them away. 15

  16. Alternate to typical “Wiring EC Edit” Method  Look for “equivalent circuit’ opportunities that allow for logic removal (or fixing an output state within a driver) rather than the need to gain access to M2-M3 wiring between logic blocks.  Delete a logic circuit by milling away the transistors until only the M1 wiring remains, then bridge input to output. 16

  17. Flip Chip Module Reconstruction 17

  18. Chip Edit FIB of the Near Future?  Maybe(?) based around a dual-beam (plus optical) Electron & Optical for imaging. Ions & electrons (possibly photons) for processing. Ideally all coaxially arranged – Same perspective view. Full complement of gases w/gas box regulation. Alternative or complement to Ga + – an ‘any ion’ column. 18

  19. Next Gen FIB Edit Tools  Commercially Available FIB Tools: Gallium (LMIS): High brightness, small spot, moderate mass. He + & Ne + Gas Field Ion Sources (GFIS): Selected for high resolution imaging & light sputtering (available as a dual beam with Ga + ). Xe + (Plasma): Heavy ion selected for mass removal (dual beam w/e - ).  Papers at ISTFA, FEBIP, FIB/SEM Workshop, etc. Electron Beam chemical activation & processing (dual beam w/Ga + ). (83 papers & posters last year at FEBIP) Beryllium, Silicon, Gold, Cr, AuSi , AuBeSi , etc. (LMAIS – metal alloy) being investigated for specific applications. Lithium & Cesium cold ion beam sources in research phase. 19

  20. Closing Remarks  FIB Chip Circuit Editing has been used by the semiconductor industry quite effectively for over 20 years to emulate redesigned hardware.  It’s getting tough…. Chip geometries are shrinking faster than new edit tool technology is evolving.  Modern packaging (3D stacking) will bring new challenges.  Our customers still want this edge, so we are committed to working with the vendor & the research community to bring next generation tooling to the semiconductor lab. 20

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