ingasb p channel self aligned finfets with 10 nm fin
play

InGaSb p-Channel Self-Aligned FinFETs with 10 nm Fin-Width Using - PowerPoint PPT Presentation

InGaSb p-Channel Self-Aligned FinFETs with 10 nm Fin-Width Using Sb-Compatible Digital Etch W. Lu 1 , I. P. Roh 2 , D.-M. Geum 2 , S.-H. Kim 2 , J. D. Song 2 , L. Kong 1 , and J. A. del Alamo 1 1 Microsystems Technology Laboratories, MIT


  1. InGaSb p-Channel Self-Aligned FinFETs with 10 nm Fin-Width Using Sb-Compatible Digital Etch W. Lu 1 , I. P. Roh 2 , D.-M. Geum 2 , S.-H. Kim 2 , J. D. Song 2 , L. Kong 1 , and J. A. del Alamo 1 1 Microsystems Technology Laboratories, MIT Sponsors: 2 Korea Institute of Science and Technology DTRA December 5, 2017 KIST Lam Research SRC

  2. Outline  Motivation  Key technology: III-Sb-compatible digital etch  InGaSb p-channel FinFET fabrication  Electrical characteristics  Conclusions 2

  3. A Case for III-Sb Electron mobility Hole mobility in QW-FETs Properties of III-Sb: • High µ n InSb • High µ p • Strong strain effect • E g engineering GaSb • Applications in photonics, etc. [Miki, 1975] [Kawashima and Kataoka, JJAP 1979] [del Alamo, Nature, 2011] 3

  4. III-Sb Transistor Research InGaAs (IEEE) 4

  5. III-Sb Transistor Research InGaAs Gu, IEDM 2011 Waldron, VLSI 2016 (IEEE) Zhao, IEDM 2013 Zota, IEDM 2016 Vardi, IEDM 2015 Vardi, EDL 2016 5 Zhou, VLSI 2016

  6. III-Sb Transistor Research InGaAs (IEEE) III-Sb transistors (All publications) 6

  7. III-Sb Transistor Research InGaAs InAs/AlSb/GaSb HEMT B. Bennett, JVST ’00 InGaSb p-SOI (IEEE) Nishi, VLSI ’15 InAs/GaSb CMOS Goh, IEDM ’15 III-Sb transistors InSb QW p-FET (All publications) InGaSb p-FinFET Radosavljevic, IEDM ’08 Lu, IEDM ’15 InAs/GaSb TFET Memišević , EDL ’16 InGaSb p-MOSFET Nainani, IEDM ’10 7

  8. Challenges: III-Sb Digital Etch W F = 5 nm D = 5 nm D = 8 nm [Vardi, IEDM 2017] [Lu, EDL, 2017] Digital etch: key of sub-10 nm InGaAs transistors 8

  9. Challenges: III-Sb Digital Etch XSEM of InGaSb FinFET [Lu, IEDM, 2015] • W f limited by EBL and RIE 9

  10. Challenges: III-Sb Digital Etch XSEM of InGaSb FinFET W f = 30 nm, L g = 100 nm 300 V GS = 0.5 V to -3.5 V I D ( µ A/ µ m) 200 100 0 [Lu, IEDM, 2015] -0.8 -0.4 0.0 • W f limited by EBL and RIE V DS (V) • Suffers from large off current 10

  11. HCl Digital Etch on III-Sb • Previous research: HCl cleans GaSb surface GaSb MOSCAPs [Nainani, JAP 2011] As-Is HCl 11

  12. HCl Digital Etch on III-Sb • Previous research: HCl cleans GaSb surface GaSb MOSCAPs 3 [Nainani, JAP 2011] 1x10 V ds = -1.05 V [Lu, IEDM, 2015] As-Is HCl I D ( µ A/ µ m) after HCl 2 1x10 1 1x10 -3 -2 -1 0 1 V GS (V) FinFETs: only mild improvement of off current 12

  13. Issue with HCl Digital Etch • HCl etches the InGaSb sidewall After RIE 1% HCl 30s 13

  14. Issue with HCl Digital Etch • HCl etches the InGaSb sidewall After RIE 1% HCl 30s DI water 2 min Water-based HCl problematic for III-Sb DE 14

  15. Alcohol-based Digital Etch After RIE 10% HCl:IPA 2 min 20 nm 20 nm [Lu, EDL, 2017] • Self-limiting process • No damage on the sidewall 15

  16. Alcohol-based Digital Etch First digital etch on III-Sb: HCl:IPA + O 2 plasma 60 D = 20 nm D = 20 nm VNW Radius (nm) 10 nm 40 20 0 0 2 4 6 Digital Etch Cycles 16

  17. Alcohol-based Digital Etch First digital etch on III-Sb: HCl:IPA + O 2 plasma 60 D = 20 nm D = 20 nm VNW Radius (nm) 40 20 2 nm/cycle 0.6 nm/cycle 0 0 2 4 6 Digital Etch Cycles Etch rate ↓ after multiple DE cycles 17

  18. Alcohol-based Digital Etch 3 cycles 10 cycles No DE r = 1 nm/cycle r = 0.2 nm/cycle HSQ InAs InGaSb 25 nm 19 nm 16 nm AlGaSb • r (III- Sb) ↓ after 3 cycles • r (III-As) >> r (III-Sb) 18

  19. Sb-compatible Digital Etch Oxidation of GaSb: • In air: ‒ Ga 2 O 3 , Sb 2 O 3 [Liu, JVST B. 2002] 19

  20. III-Sb-compatible Digital Etch Oxidation of GaSb: • In air: ‒ Ga 2 O 3 , Sb 2 O 3 • In strong oxidation agents: ‒ Ga 2 O 3 , Sb 2 O 3 , Sb 2 O 5 (insoluble in aqueous acid/alkali) [Liu, JVST B. 2002] DE = oxidation + dissolution, both critical for III-Sb! 20

  21. III-Sb-compatible Digital Etch Survey of digital etch combinations: Best results: RT O 2 atmosphere + HCl:IPA 21

  22. III-Sb-compatible Digital Etch O 2 oxidation + HCl:IPA, IPA rinsing 2 cycles 4 cycles No DE r = 2 nm/cycle r = 2 nm/cycle HSQ InAs 25 nm 17 nm 9 nm InGaSb AlGaSb r (III-As) = r (III-Sb) 22

  23. InGaSb FinFETs TEM Heterostructure (MBE at KIST) p+ cap Composite cap 6 nm -1.1% strain InAlSb H c = 23 nm 23 nm Graded buffer InGaSb AlGaSb 20 nm • Channel μ p = 1175 cm 2 /V∙s • Buffer/channel resistivity ~ 10 9 23

  24. InGaSb FinFET Process • Ni Ohmic contact HSQ • SiO 2 spacer • Gate recess (dry + wet) InGaSb • Fin RIE • Digital etch Al 2 O 3 /Al • Al 2 O 3 /Al Gate stack • Via + metal 24

  25. Ohmic Contacts Ni contacts, 350 °C RTA, 3 min × 10 4 4 4 10 R Total ⋅ W (Ω⋅µ m ) Mo N a = 1 ⋅ 10 19 cm -3 R c = 93 Ω⋅µ m 3 R c ( Ω⋅µ m ) 3 10 W 2 Ni [MIT '15] 2 10 N a = 3 ⋅ 10 19 cm -3 1 Ni R c = 22 Ω⋅µ m [Guo, EDL, 2015] 1 10 0 0 100 200 300 400 0 5 10 15 20 L d ( µ m ) RTA Temp ( ° C ) R c = 22 Ω∙μ m  4x reduction of R c from 2015 FinFETs 25

  26. Fin Etch BCl 3 /N 2 13.5:5.5, 250°C BCl 3 /Ar/SiCl 4 3:11:0.4, 250°C [Lu, IEDM 2015] This work 50 nm InAs GaSb High-quality simultaneous InAs and GaSb etching 26

  27. InGaSb FinFET Process Finished devices • 3.5 nm Al 2 O 3 gate dielectric • Final FGA anneal at 150 ° C for 3 min 27

  28. InGaSb FinFET Process HSQ 10 nm 10 nm 3.5 nm 23 nm InGaSb Al 2 O 3 AlGaSb 84° 50 nm • Narrowest W f = 10 nm • Fin AR = 2.3 28

  29. Electrical Characteristics W f = 10 nm, L g = 20 nm, N f = 1 V DS = -0.5 V 2 200 10 V GS = -1 V to 1 V in 0.4 V step V DS = -50 mV 200 150 V DS = -0.5 V I D ( µ A/ µ m ) I D ( µ A/ µ m ) 1 10 150 g m ( µ S/ µ m ) 100 100 0 10 S min = 50 V DS = -50 mV 50 260 mV/dec -1 0 10 0 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 -0.5 0.0 0.5 -1.0 -0.5 0.0 0.5 1.0 V GS (V) V DS (V) V GS (V) • S ~ 260 mV/dec • g m,max = 160 μ S/ μ m • Single fin device: current fluctuations 29

  30. Electrical Characteristics W f = 10 nm, L g = 1 μ m, N f = 100 V GS = -1 V to 1 V in 0.4 V step 0 10 V DS = -0.5 V 4 V DS = -50 mV I D ( µ A/ µ m ) 3 I D ( µ A/ µ m ) -1 10 2 -2 10 S min = 1 290 mV/dec 0 -3 10 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 -0.5 0.0 0.5 V DS (V) V GS (V) 30

  31. Electrical Characteristics W f = 10 nm, L g = 1 μ m, N f = 100 W f = 30 nm, L g = 1 μ m V GS = -1 V to 1 V in 0.4 V step 12 4 [Lu, IEDM, 2015] I D ( µ A/ µ m ) 3 8 I D ( µ A/ µ m) 2 4 1 0 0 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 V DS (V) V DS (V) Significant improvement over 1 st gen FinFETs 31

  32. g m Scaling W f = 26 nm W f = 18 nm 300 W f = 14 nm g m ( µ S/ µ m) W f = 10 nm 200 W f ↓ 100 0 100 1000 L g (nm) L g ↓  g m ↑ W f ↓  g m ↓ 32

  33. ON Resistance 10 W f = 26 → 10 nm 8 R f R on (k Ω⋅µ m) 6 4 2 R SD 0 0 20 40 60 80 100 120 L g (nm) 33

  34. ON Resistance 10 100 W f = 26 → 10 nm 8 R f R on (k Ω⋅µ m) R f (k Ω/฀ ) 6 10 4 -1 2 R SD 0 1 0 20 40 60 80 100 120 10 100 L g (nm) W f (nm) 34

  35. ON Resistance 10 10 100 W f = 26 → 10 nm 8 R SD (k Ω⋅µ m) R f R on (k Ω⋅µ m) R f (k Ω/฀ ) 6 1 10 4 -1 -1 2 R SD 0 0.1 1 0 20 40 60 80 100 120 10 100 10 100 L g (nm) W f (nm) W f (nm) R f and R SD ~ 1/W f 35

  36. V T Scaling W f = 26 nm W f = 18 nm 1.2 W f = 14 nm V T (V) W f = 10 nm 0.8 W f ↓ 0.4 0.0 10 100 1000 L g (nm) W f ↓  better V T roll-up 36

  37. Off-state Current W f = 20 nm, L g = 1 µm 2 10 0 DE cycle 1 10 I D ( µ A/ µ m ) 0 10 1 DE cycle -1 10 -2 10 -1.0 -0.5 0.0 0.5 1.0 V GS (V) 1 DE cycle significantly improves off current 37

  38. Off-state Current W f = 20 nm, L g = 1 µm 2 10 0 DE cycle 1 10 I D ( µ A/ µ m ) 4 DE cycle 0 10 1 DE cycle -1 10 -2 10 -1.0 -0.5 0.0 0.5 1.0 V GS (V) Device degrades after multiple DE cycles 38

  39. Off-state Current W f = 20 nm, L g = 1 µm 3 cycles of DE 2 10 InGaSb 0 DE cycle 1 10 I D ( µ A/ µ m ) 4 DE cycle 0 10 1 DE cycle -1 10 AlGaSb -2 10 -1.0 -0.5 0.0 0.5 1.0 V GS (V) • Buffer is damaged after multiple DE cycles 39

  40. Off-state Current Exposure in air W f = 20 nm, L g = 1 µm 3 cycles of DE after fin etch 2 10 InGaSb 0 DE cycle 1 10 I D ( µ A/ µ m ) 4 DE cycle 0 10 1 DE cycle -1 10 AlGaSb -2 10 -1.0 -0.5 0.0 0.5 1.0 V GS (V) • Buffer is damaged after multiple DE cycles • AlGaSb is very reactive 40

  41. Off-state Current 1 10 L g = 1 µm I D ( µ A/ µ m ) 0 W f = 100  14 nm 10 HSQ -1 10 InGaSb -2 10 AlGaSb -3 10 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 V GS (V) 41

  42. Off-state Current 1 10 L g = 1 µm I D ( µ A/ µ m ) 0 W f = 100  14 nm 10 HSQ -1 10 InGaSb -2 10 AlGaSb AlGaSb No InGaSb channel -3 10 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 V GS (V) Buffer leakage contributes substantially to off current 42

  43. Benchmark Normalized by conducting width This work 300 FinFETs 200 MIT CSW ’17 g m ( µ S/ µ m) Planar 100 MIT IEDM ’15 0 0 50 100 150 200 W f (nm) Record g m = 268 μS / μm at W f = 46 nm 43

Recommend


More recommend