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HCAL uTCA Readout Crate Ethernet GBT links from front-ends 12 AMC - PowerPoint PPT Presentation

HCAL uTCA Readout Crate Ethernet GBT links from front-ends 12 AMC Slots Power 1 H C M Commercial MCH uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR Management Ethernet Power AMC13 AMC13 Clocks Fast controls


  1. HCAL uTCA Readout Crate Ethernet GBT links from front-ends 12 AMC Slots Power 1 H C M Commercial MCH uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR uHTR Management Ethernet Power AMC13 AMC13 Clocks Fast controls DAQ Fiber links to trigger DAQ optical fibers TTS / Local Trigger Legacy TTC 2012-05-22 E. Hazen -- Upgrade Week 2

  2. MicroTCA Interface to CMS (Interim) Prototype exists in CDAQ group Data to DAQ 5 Gb/s New DAQ SFP+ SFP+ receiver card Central 16 AMC13 produced CMS 1 or 2 links per crate One in DAQ lab DAQ SFP+ SFP+ to S-Link, Myrinet, etc since early 2012 AMC13 TTC 160 Mb/s TTCex System In: TTC SFP Out: TTS OptRx RJ-45 OptRx FPGA To FMM OptRx Local MCH Trigger FMM Adapter Gigabit Ethernet(s) DCS Controls Prototype under development at BU 2012-05-22 E. Hazen -- Upgrade Week 4

  3. Teststand at University of Minnesota

  4. µ TCA Dual-Star Backplane Bi-directional serial (up to 10Gb/sec) point-to-point links from each AMC to MCH Note: Interconnections can be customized (redundant links to each MCH) by the backplane manufacturer inexpensively. CMS Use Fabric A (1 link) Fabric A (1 link) Gigabit Ethernet DAQ @ 2-4 Gb/s Fabric B (1 link) Fabric B (1 link) Spare LVDS TTC Fabric D-G Fabric D-G (4 links) Spare Spare CLK1 CLK1 Spare MLVDS LHC clock MCH 1 MCH 2 aka “AMC13” Commercial /Std Custom design for CMS 2012-05-22 E. Hazen -- Upgrade Week 11

  5. HCAL Development Requirements • Expect to setup a uTCA at Fermilab which will handle both data and control functions • It will serve as a working testbench for FE Modules and the readout system – Characterize our analog ASICs ‐ QIE10s (Charge Integration Encoder) • DC charge calibration ‐ > slope, offset – Read/Write to local registers – Exercise L1 and L2 buffers – Exercise optical links

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