Digital Signal Processing for the APFEL Oliver Noll ¯ PANDA-Collaboration Meeting 18/3 November 2018
1 APFEL ASIC Feature Extraction 2 Integration of Feature Extraction into SADC 3 MAMI Beamtest with SADC
Digital Signal Processing Example Pulse, 450 MeV CC 15500 Properties 15000 Hit detection Signal [a.u.] Height Time 14500 Energy (pulse height) 14000 Time 0 5 10 15 20 Requirements on Feature Extr. Time [ μ s] Example Pulse, Very Tiny 10 Fast (calculation time) 5 Sensitive to ASIC pulse shape 0 Signal [a.u.] 5 Height ? Linear 10 Threshold as low as possible 15 TIME ? Dead time as short as possible 20 0 5 10 15 20 Time [ μ s] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 1/25
Digital Signal Processing Filter Modification of transfer function Suppression of HF noise ⇒ smoothing Spectrum of 10000 ASIC Testpulses 2000 TMAX Amplitude Extraction on FPGA Feature Extraction µ = 0.56 % σ 1500 ∼ 150 MeV Determination of amplitude Events 1000 T 0 determination Pileup detection/correction 500 0 1100 1150 1200 1250 1300 1350 1400 1450 1500 Amplitude [a.u.] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 2/25
Filter (smoothing) f(t) g(t) Analog System g m f m Digital System ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 3/25
Smoothing via Finite Impulse Response (FIR) Filter Idea Transfer function suppressed HF noise (low pass) Z transformation of impulse response H ( z ) = � N n =0 h ( n ) · z − n h ( n ) : Filter Koeffizienten z = e i ω T Each output value is weighted sum of most recent input values out [ n ] = h 0 in [ n ] + h 1 in [ n − 1] + ... + h N in [ n − N ] 0,0,1,0,0,0,0,... Multiplier h 0 h 1 h 2 h 3 h N Adder z -1 + z -1 + z -1 + z -1 + 0,0,h 1 ,h 2 ,h 3 ,...,h N ,0 One sample delay and register (Tap) ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 4/25
Smoothing via Finite Impulse Response (FIR) Filter 25 Taps, 80.0 MS/s 0 fs/2 = 40.0 MHz Pass Band (0-8 MHz) Trans. Band (8-16 MHz) 10 Stop Band (16-40.0 MHz) Attenuation [dB] 20 30 40 50 0 5 10 15 20 25 30 35 40 Freq. [MHz] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 5/25
Smoothing via Finite Impulse Response (FIR) Filter FIR Filter Example 25 Taps 10 Raw Trace FIR Smoothing 0 10 Amplitude [a.u.] 20 30 40 50 60 80 100 120 140 160 180 200 Time [Sample] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 6/25
Smoothing via Finite Impulse Response (FIR) Filter Benefits Reliable smoothing procedure (stable, no self-excitation) No pulse washout (pulse slope) Best way to increase signal/noise ratio Drawback FIR filtering eats FPGA recourses ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 7/25
Smoothing via Finite Impulse Response (FIR) Filter 0,0,1,0,0,0,0,... Multiplier h 0 h 1 h 2 h 3 h N Adder z -1 + z -1 + z -1 + z -1 + 0,0,h 0 ,h 1 ,h 2 ,h 3 ,...,h N One sample delay and register (Tap) Implementation Efficient synthesis with Digital Signal Processing slices (DSP) ∼ 1 DSP slices per tap, 25 taps · 32 channel 800 DSP slices 600 DSP slices on XC7K160T Need of resource saving implementation ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 8/25
Implementation with Distributed Arithmetic Idea: Using Look Up Tables (LUT) instate of multiplication slices K � y = h k · x k k =0 N � b kn 2 n x k = n =0 ... � K N � � � 2 n y = h k · b kn n =0 k =0 Precalculated and stored in Look Up Tables (LUT) ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 9/25
FIR with Distributed Arithmetic VHDL Generator Software package which generates hardware description Free choose of parameters Number of taps Samplingrate Pass-/stopband Fix point resolution ... Hardware Simulation GHDL testbench Timing integrity ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 10/25
Time Measurement and Amplitude EXtraction (TMAX) Example Pulse, 450 MeV CC 15500 r TMAX Amplitude Path 15000 Signal [a.u.] Sensitive to rising edge 14500 Cancels out falling edge No overshoot 14000 Baseline subtraction 0 5 10 15 20 Time [ μ s] TMAX Filter, 450 MeV CC 1000 Derivative: D [ i ] = T [ i + r ] − T [ i ] 0 Heaviside function Θ : 1000 � 0 : x < 0 Filter [a.u.] x �→ 2000 1 : x ≥ 0 TMAX: 3000 N F TMAX = � D [ i ] − Θ[ − D [ i ]] · D [ i ] 4000 Raw Signal i =0 TMAX 5000 5 10 15 Time [ µ s] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 11/25
Time Measurement and Amplitude EXtraction (TMAX) Filter Example 50 MeV Signal 60 Raw Trace FIR Smoothing 40 Time Derivative Extracted Ampl. T 0 TMAX Time Path 20 Amplitude [MeV] 0 T 0 at maximum 20 Linear interpolation between 40 samples 60 80 100 120 140 160 180 200 Time [Sample] Implementation with LUT Filter Example 5 MeV Signal Raw Trace 6 FIR Smoothing Derivative: Time Derivative 4 Extracted Ampl. D [ i ] = T [ i + r ] − T [ i ] T 0 2 Time at change of sign: Amplitude [MeV] i 0 and i 1 0 Linear Interpolation 2 D [ i 0 ] T 0 = i 0 + D [ i 0 ] − D [ i 1 ] 4 6 80 100 120 140 160 180 Time [Sample] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 12/25
Time Measurement and Amplitude EXtraction (TMAX) Is it worth all the effort? ¯ PANDA operates triggerless FIR improves time resolution: better time resolution → better energy resolution Time Resolution Time Resolution 40 5 Simulation No FIR Simulation No FIR Simulation FIR 25 Taps Simulation FIR 25 Taps 35 4 30 Time Resolution [ns] Time Resolution [ns] 25 3 20 2 15 10 1 5 0 0 0 100 200 300 400 500 600 700 800 900 0 100 200 300 400 500 600 700 800 900 Signal [MeV] Signal [MeV] ¯ APFEL ASIC Feature Extraction Oliver Noll PANDA-Collaboration Meeting 18/3 13/25
Integration of Feature Extraction into SADC ¯ Integration of Feature Extraction into SADC Oliver Noll PANDA-Collaboration Meeting 18/3 14/25
Integration of Feature Extraction into SADC x 32 ADC Bonn Firmware SMA Smoothing Johannes M ¨ ullers External Trigger Feature Extraction HISKP, Bonn Firmware for Crystal Barrel Package Builder GitLab repository Meetings in Bonn UDP Infrastructure Helping hand Gbit Interface ¯ Integration of Feature Extraction into SADC Oliver Noll PANDA-Collaboration Meeting 18/3 15/25
Integration of Feature Extraction into SADC x 32 ADC Mainz Firmware FIR Smoothing Using Bonn infrastructure External Trigger TMAX Triggerless FIR filtering Package Builder TMAX feature extraction New data package concept Arbiter Full hardware simulation UDP Infrastructure Gbit Interface ¯ Integration of Feature Extraction into SADC Oliver Noll PANDA-Collaboration Meeting 18/3 16/25
MAMI Beamtest with SADC ¯ MAMI Beamtest with SADC Oliver Noll PANDA-Collaboration Meeting 18/3 17/25
MAMI Beamtest with SADC Measuring Program Setup Energies: 195,450,855 MeV Different APD gains PROTO16-2 (4x4) Central shot in every crystal SADC with Mainz firmware Linearity Triggerless Energy resolution Reference scintillator Rate scan (up to 400 kHz) FIR tap scan ¯ MAMI Beamtest with SADC Oliver Noll PANDA-Collaboration Meeting 18/3 18/25
Single Spectra Example ¯ MAMI Beamtest with SADC Oliver Noll PANDA-Collaboration Meeting 18/3 19/25
Sum Spectra Example ¯ MAMI Beamtest with SADC Oliver Noll PANDA-Collaboration Meeting 18/3 20/25
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