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Digital Circuits and Systems Multiplexers Shankar Balachandran* - PowerPoint PPT Presentation

Spring 2015 Week 3 Module 14 Digital Circuits and Systems Multiplexers Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay Multiplexers


  1. Spring 2015 Week 3 Module 14 Digital Circuits and Systems Multiplexers Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay

  2. Multiplexers  Multiplexing means transmitting a large number of information units over a smaller number of channels or lines.  A digital multiplexer ( MUX ) selects binary information from one of many input lines and directs it to a single output line.  Data selector (2 n :1 MUX).  Inputs: 2 n data inputs, n select lines.  Output: 1 data output line. s1 s0 Out Out D0 s1 s0 D0 0 0 0 1 D1 D1 0 1 D0 D1 Out 0 D2 D2 1 0 D2 D3 1 D3 D3 1 1 s1 s0 (control) Multiplexers 2

  3. 2:1 Mux s f s w 0 0 w 0 0 f w 1 1 w 1 1 (b) Truth table (a) Graphical symbol w 0 s f w 1 (c) Sum-of-products circuit Multiplexers 3

  4. Internal Structure of a 4:1 MUX  A 2 n : 1 MUX needs 2 n , ( n +1)-input AND gates for selection and a 2 n -input OR gate to generate the final output.   AND/OR logic structure Multiplexers 4

  5. Closeness to Decoders D 0 D 1 D 2 D 3 En Connect all the input lines of the multiplexer together (to make enable) and remove the OR gate to give you a decoder Multiplexers 5

  6. MUX Output Boolean Expression  2 : 1 MUX     Out s D s D 0 1  4 : 1 MUX         Out s s D s s D s s D s s D 1 0 0 1 0 1 1 0 2 1 0 3  General expression for 2 n : 1 MUX n  2 1     th Out  m D m i where is the minterm i i i  i 0 Multiplexers 6

  7. Using 2:1 Muxes to Build a 4:1 Mux s 1 s 0 w 0 0 w 1 1 0 f 1 w 0 2 w 1 3 Multiplexers 7

  8. Practical Application of Multiplexers s x y 1 1 x y 2 2 2x2 crossbar switch x 0 1 y 1 1 s x 0 2 y 2 1 Multiplexers 8

  9. MUX Based Logic Design  MUXes are sometimes called hardware look-up tables .  To implement an n -variable function using a 2 n :1 MUX  Use a 2 n :1 MUX, connect n input variables to the n select lines ( in the correct MSB-LSB order ).  Wire MUX input D i to 1 if function includes minterm m i . All other inputs are set to 0 .  Example : Implement the function      F a , b , c  , , , 1 2 4 7 using a MUX of appropriate size. F Multiplexers 9

  10. MUX Based Logic  Advantages :  Easier to design combinational circuits.  Easier to debug circuits designed using multiplexers.  Disadvantages :  Multiplexers can become very large for a large number of inputs.   Good for small circuits.  Normally, any function with more than 4 variable is impractical for direct implementation (i.e., using a single large MUX).  Use tree of small MUXes or using a variable as MUX data input or Shannon’s Expansion Theorem for implementing large functions. Multiplexers 10

  11. Multiplexer Tree  A larger MUX can be implemented using a tree of smaller MUXes.      F a , b , c  , , , 1 2 4 7  Example : Implement the function using smaller MUXes instead of one 8:1 MUX. Multiplexers 11

  12. End of Week 3: Module 14 Thank You Multiplexers 12

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