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CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) Compilation Stages


  1. CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs

  2. Towards the Hardware • High-level language (Java) –High-level language (C) → assembly language → machine language (IA-32)

  3. Compilation Stages count = 0; 00000000000000000000000000000000 mov ECX, 0 while (n > 1) { 00000000000000000000000000000000 .loop: 01100011010101110110001101010111 count++; cmp EDX, 1 00101011101011010010101110101101 if (n & 1) jle .endloop 11010001110111011101000111011101 add ECX, 1 n = n*3 + 1; 00101110100111000010111010011100 else mov EAX, EDX 11010010001111001101001000111100 n = n/2; and EAX, 1 11010000011111011101000001111101 } je .else 11010011101010011101001110101001 mov EAX, EDX 11010000111111101101000011111110 add EDX, EAX 11010001010000101101000101000010 add EDX, EAX add EDX, 1 jmp .endif .else: sar EDX, 1 .endif: jmp .loop .endloop: High level Assembly language Machine language language

  4. Building and Running • To build an executable $ gcc program.c –o program • Result ! Complete executable binary file ! Machine language 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 • To run: $ ./program

  5. Compiling Into Assembly C Code (code.c) Generated Assembly (code.s) int sum(int x, int y) sum: { push ebp int t = x+y; mov ebp, esp accum += t; mov edx, DWORD PTR [ebp+12] return t; mov eax, DWORD PTR [ebp+8] } add eax, edx pop ebp ret • Obtained with command gcc –masm=intel -S code.c • Produces file code.s

  6. Lecture Goals • Help you learn… ! Relationship between C and assembly language ! IA-32 assembly language through an example • Why do you need to know this?

  7. Computer Architecture Background

  8. Main Memory Memory addresses are defined using unsigned binary integers

  9. CPU and Memory • Example of a dual core architecture Registers are fastest-speed temporary storage Cache acts as a buffer between memory and registers Memory 0000000000000000 10100111 0000000000000001 11010010 • The only large storage area that the CPU can access directly 0000000000000010 11000010 • Hence, any program executing must 00101001 0000000000000011 be in memory . . . . . .

  10. Central Processing Unit(CPU) AX Machine Instr1 Machine Instr2 BX Arithmetic Logic Unit Machine Instr3 Machine Instr4 (ALU) CX DX q Machine Instructions ! move data in and out of registers ! manipulate the register contents q Registers act as temporary variables

  11. Remember This? Part of the ALU

  12. Central Processing Unit (CPU) • Runs the loop Fetch-Decode-Execute Decode Fetch Next Execute Execute Execute START HALT START Instruction Instruction Instruction Instruction Instruction q Fetch the next instruction from memory Where from? A CPU register called the Instruction Pointer - (EIP) holds the address of the instruction to be fetched next q Decode the instruction and fetch the operands q Execute the instruction and store the result

  13. Control Unit: Instruction Decoder • Determines what operations need to take place ! Translate the machine-language instruction • Control what operations are done on what data ! E.g., control what data are fed to the ALU ! E.g., enable the ALU to do multiplication or addition ! E.g., read from a particular address in memory src1 src2 operation flag/carry ALU dst

  14. Intel Architecture, 32-bit (IA-32) CPU Registers Memory Registers EAX EIP Addresses TEXT EBX DATA Data ECX HEAP EDX Instructions ESI EDI ESP EBP STACK Condition Codes EFLAGS CF ZF SF OF EIP Instruction Pointer ESP, EBP Reserved for special use EAX Always contains return value

  15. Central Processing Unit(CPU) AX Machine Instr1 Machine Instr2 BX Arithmetic Logic Unit Machine Instr3 Machine Instr4 (ALU) CX DX q Machine Instructions ! move data in and out of registers ! manipulate the register contents q Registers act as temporary variables

  16. Registers • Small amount of storage on the CPU ! Can be accessed more quickly than main memory • Instructions move data in and out of registers ! Loading registers from main memory ! Storing registers to main memory • Instructions manipulate the register contents ! Registers essentially act as temporary variables ! For efficient manipulation of the data • Registers are the top of the memory hierarchy ! Ahead of main memory, disk, tape, …

  17. C Code vs. Assembly Code

  18. Kinds of Instructions • Reading and writing data ! count = 0 ! n count = 0; • Arithmetic and logic operations while (n > 1) { ! Increment: count++ count++; ! Multiply: n * 3 if (n & 1) ! Divide: n/2 ! Logical AND: n & 1 n = n*3 + 1; • Checking results of comparisons else ! Is (n > 1) true or false? n = n/2; ! Is (n & 1) non-zero or zero? } • Changing the flow of control ! To the end of the while loop (if “n ≤ 1”) ! Back to the beginning of the loop ! To the else clause (if “n & 1” is 0)

  19. Variables in Registers Registers count = 0; while (n > 1) { count ECX count++; n EDX if (n & 1) n = n*3 + 1; mov ECX, DWORD PTR count else mov EDX, DWORD PTR n n = n/2; }

  20. Immediate and Register Addressing count ECX n EDX count=0; mov ECX, 0 while (n>1) { count++; add ECX, 1 if (n&1) n = n*3+1; else written to n = n/2; a register }

  21. General Syntax op Dest , Src Perform operation op on Src and Dest Save result in Dest

  22. Immediate and Register Addressing count ECX n EDX count=0; while (n>1) { count++; mov EAX, EDX if (n&1) and EAX, 1 n = n*3+1; else n = n/2; } Computing intermediate value in register EAX

  23. Immediate and Register Addressing count ECX n EDX count=0; while (n>1) { count++; if (n&1) mov EAX, EDX n = n*3+1; add EDX, EAX add EDX, EAX else add EDX, 1 n = n/2; } Adding n twice is cheaper than multiplication!

  24. Immediate and Register Addressing count ECX n EDX count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; sar EDX, 1 } Shifting right by 1 bit is cheaper than division!

  25. Changing Program Flow • Cannot simply run next instruction count=0; ! Check result of a previous operation while (n>1) { ! Jump to appropriate next instruction count++; • Jump instructions if (n&1) ! Load new address in instruction pointer n = n*3+1; • Example jump instructions else ! Jump unconditionally (e.g., “}”) n = n/2; ! Jump if zero (e.g., “n & 1”) } ! Jump if greater/less (e.g., “n > 1”)

  26. Jump Instructions • Jump depends on the result of previous arithmetic instruction Registers EAX EIP Jump Description EBX jmp Unconditional ECX je Equal / Zero EDX jne ESI jg EDI jge ESP jl EBP jle Condition Codes EFLAGS CF ZF SF OF

  27. Remember This? Part of the ALU SF CF OF

  28. ! Jump to different part of code depending on condition codes jX Condition Description jmp 1 Unconditional je ZF Equal / Zero jne ~ZF Not Equal / Not Zero js SF Negative jns ~SF Nonnegative jg ~(SF^OF)&~ZF Greater (Signed) jge ~(SF^OF) Greater or Equal (Signed) jl (SF^OF) Less (Signed) jle (SF^OF)|ZF Less or Equal (Signed) ja ~CF&~ZF Above (unsigned) jb CF Below (unsigned)

  29. Conditional and Unconditional Jumps • Comparison cmp compares two integers ! Done by subtracting the first number from the second ! Discards the results, but sets flags as a side effect: – cmp EDX, 1 (computes EDX – 1) – jle .endloop (checks whether result was 0 or negative) • Logical operation and compares two integers: – and EAX, 1 (bit-wise AND of EAX with 1) – je .else (checks whether result was 0) • Also, can do an unconditional branch jmp – jmp .endif – jmp .loop

  30. Jump and Labels: While Loop count ECX n EDX .loop: cmp EDX, 1 jle .endloop … while (n>1) { Checking if EDX is less than or equal to 1. } jmp .loop .endloop:

  31. count ECX Jump and Labels: While Loop n EDX mov ECX, 0 .loop: cmp EDX, 1 jle .endloop count=0; add ECX, 1 while (n>1) { mov EAX, EDX count++; and EAX, 1 je .else if (n&1) mov EAX, EDX n = n*3+1; add EDX, EAX add EDX, EAX else add EDX, 1 n = n/2; jmp .endif .else: } sar EDX, 1 .endif: jmp .loop .endloop:

  32. count ECX Jump and Labels: If-Then-Else n EDX mov EAX, EDX and EAX, 1 je .else if (n&1) … ... “then” block else ... jmp .endif .else: … “else” block .endif:

  33. count ECX Jump and Labels: If-Then-Else n EDX mov ECX, 0 .loop: cmp EDX, 1 jle .endloop count=0; add ECX, 1 while(n>1) { mov EAX, EDX count++; and EAX, 1 je .else if (n&1) mov EAX, EDX n = n*3+1; add EDX, EAX “then” block add EDX, EAX else add EDX, 1 n = n/2; jmp .endif .else: } “else” block sar EDX, 1 .endif: jmp .loop .endloop:

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