CPE 335 CPE 335 Computer Organization MIPS Arithmetic Part II - PowerPoint PPT Presentation

CPE 335 CPE 335 Computer Organization MIPS Arithmetic – Part II Dr. Iyad Jafar Adapted from Dr. Gheith Abandah slides http://www.abandah.com/gheith/Courses/CPE335_S08/index.html CPE 232 MIPS Arithmetic 1

Shift Operations � Shifts move all the bits in a word left or right sll $t2, $s0, 8 , , #$t2 = $s0 << 8 bits srl $t2, $s0, 8 #$t2 = $s0 >> 8 bits 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Op code rs rt rd shamt funct � Notice that a 5-bit shamt field is enough to shift a 32- bit value 2 5 – 1 or 31 bit positions p � Such shifts are logical because they fill with zeros CPE 232 MIPS Arithmetic 2

Shift Operations, con’t � An arithmetic shift ( sra ) maintain the arithmetic correctness of the shifted value (i.e., a number shifted right one bit should be ½ of its original value; a number ½ f shifted left should be 2 times its original value) � so sra uses the most significant bit (sign bit) as the bit � so sra uses the most significant bit (sign bit) as the bit shifted in � note that there is no need for a sla when using two’s g complement number representation sra $t2, $s0, 8 #$t2 = $s0 >> 8 bits � The shift operation is implemented by hardware separate from the ALU separate from the ALU � Using a barrel shifter : is a digital circuit that can shift a data word by a specified number of bits in one clock cycle ! y y � Simply a set of multiplexers multiplexers ! CPE 232 MIPS Arithmetic 3

Shift Operations – Barrel Shifter D 0 Example : 4-bit barrel shifter (rotate to the D 3 Y 0 left) D 2 D D 1 4-bit Barrel D 1 D Y 1 4 4 4 4 Shifter D 0 Y 1 D 3 D 2 S 0 S 1 D 2 Shift Value Output D 1 Y 2 Y 2 1 D 0 S1 S0 Y3 Y2 Y1 Y0 D 3 0 0 D3 D2 D1 D0 0 1 0 1 D2 D2 D1 D0 D3 D1 D0 D3 D 3 1 0 D1 D0 D3 D2 D 2 Y 3 D 1 1 1 1 1 D0 D0 D3 D2 D1 D3 D2 D1 D 0 S 1 and S 0 determine the shift amount 0,1,2, and 3 CPE 232 MIPS Arithmetic 4

Multiply � Binary multiplication is just a bunch of left shifts of the and adds � Size of product is 2n. 4 bits 4 bits Partial Products 8 bits 8 bits CPE 232 MIPS Arithmetic 5

Multiplication Hardware � Hardware implementation of multiplication algorithm � Operation � Initialize the lower 32 bits of the multiplicand register with the multiplicand � Initialize the product register to 0. � If the multiplier LSB is 1 add multiplicand to product � If the multiplier LSB is 1, add multiplicand to product � If the multiplier LSB is 0, don’t add � Shift multiplicand left and multiplier right by one bit � Repeat 32 times R t 32 ti CPE 232 MIPS Arithmetic 6

Multiplication Hardware � Flowchart for multiplication algorithm � If each step takes one cycle, we need almost 100 cycles for 32 bit multiplication lti li ti � Check the multiplication example in page 180 for example in page 180 for better understanding ! CPE 232 MIPS Arithmetic 7

Optimized Multiplication Hardware � ALU and multiplicand register are both 32 bits wide � Multiplier register is omitted and multiplier is placed in the lower 32 bits of the product register � The product register is shifted to the right along with the multiplier register until we have 32 repetitions register until we have 32 repetitions CPE 232 MIPS Arithmetic 8

Fast Multiplication Units � Use 31 32-bit adders to compute the partial products � One input is the multiplicand ANDed with a multiplier and the ANDed with a multiplier, and the other is the partial product from previous step. � Example: show the multiplication tree to compute 5 X 3. Assume unsigned numbers represented using 3 bits and we have 4-bit ALU. CPE 232 MIPS Arithmetic 9

Multiplication - Notes � Multiplies are done by fast, dedicated hardware and are much more complex and slower than adders p � Multiplication by power of two can be performed by p y p p y simple left shifts in hardware. It is the compiler responsibility to choose when to use left shifts for multiplication by power of 2 in order to reduce the multiplication by power of 2 in order to reduce the execution time � Signed multiplication can be performed in similar manner. Convert the multiplicand and the multiplier to positive numbers (if necessary), then determine the product sign from their signs. What is the logic required to compute the sign of the product ? required to compute the sign of the product ? CPE 232 MIPS Arithmetic 10

MIPS Multiply Instructions � Multiply produces a double precision product rt mult mult $s0, $s1 # hi||lo $s0 $s1 $s0 $s1 # hi||lo = $s0 * $s1 rs multu $s0, $s1 # hi||lo = $s0 * $s1 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Op code rs rt rd shamt funct � Low-order word of the product is left in processor register lo and the high-order word is left in register hi � Instructions mfhi rd and mflo rd are provided to move the product to (user accessible) registers in the register file � Both instructions ignore overflow; it is the responsibility of the � Both instructions ignore overflow; it is the responsibility of the software to check if the result fits into 32 bits ! � For multu, there is no overflow if hi is 0 � For mult, there is no overflow if hi is the replicated sign of lo CPE 232 MIPS Arithmetic 11

Division � Division is just a bunch of quotient digit guesses and left shifts and subtracts � Dividend = Quotient x Divisor + Remainder CPE 232 MIPS Arithmetic 12

Division Hardware � Division algorithm � Divisor is placed in the upper � Divisor is placed in the upper 32 bits and dividend is placed in the lower 32 bits of the remainder register remainder register CPE 232 MIPS Arithmetic 13

MIPS Divide Instruction � Divide generates the reminder in hi and the quotient in lo div $s0, $s1 # lo = $s0 / $s1 # hi = $s0 mod $s1 # hi = $s0 mod $s1 rs rt divu $s0, $s1 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Op code rs rt rd shamt funct � Instructions mfhi rd and mflo rd are provided to move the quotient and reminder to (user accessible) registers in the register file � As with multiply, divide ignores overflow so software must determine if the quotient is too large. determine if the quotient is too large. Software must also check the divisor to avoid division by 0. � CPE 232 MIPS Arithmetic 14

Divide - Notes � Signed division � Remember the signs of the dividend and divisor and use to determine the sign of the quotient � The sign of the remainder is always the same as the dividend (Check by yourself the division of 5/2 using different combinations of (Ch k b lf th di i i f 5/2 i diff t bi ti f the signs of the dividend and the divisor ) � Fast division algorithms use look-up tables to guess several quotient bits per step. The algorithms rely on q p p g y subsequent steps to correct wrong guesses � The Pentium bug in 1994 � Cost for recall was about $500M CPE 232 MIPS Arithmetic 15

Representing Big (and Small) Numbers � How to encode real numbers ? H t d l b ? 4,600,000,000 or 4.6 x 10 9 � 0.0000000000000000000000000166 or 1.6 x 10 -27 � � There is no way we can encode either of the above in a 32-bit integer. � Floating point representation (-1) sign x F x 2 E � Still have to fit everything in 32 bits (single precision) � Normalized representation (no leading zeros and one bit to the left of binary point) S E (exponent) Fraction 1 bit 8 bits 23 bits � More bits in the fraction (F) or the exponent (E) is a trade-off More bits in the fraction (F) or the exponent (E) is a trade off between precision (accuracy of the number) and range (size of the number) � Smallest number 2.0x10 -38 and largest is 2.0x10 38 CPE 232 MIPS Arithmetic 16

Representing Big (and Small) Numbers � Overflow and underflow ! � Double precision format (use 64 bits instead of 32) S E F 1 bit 11 bits 52 bits � Smallest number 2.0x10 -308 and largest is 2.0x10 308 � Most computers these days conform to the IEEE 754 floating point p y g p standard � To pack more bits into the significand, one bit of the normalized bi binary numbers is implicitly assumed 1 b i i li itl d 1 � Since 0 has no leading 1, it has a reserved exponent value of 0 so that hardware won’t attach 1 to it that hardware won t attach 1 to it CPE 232 MIPS Arithmetic 17

Representing Big (and Small) Numbers � Special numbers in the IEEE standard Single Precision Single Precision Double Precision Double Precision Object Represented Object Represented E (8) F (23) E (11) F (52) 0 0 0 0 true zero (0) 0 nonzero 0 nonzero ± denormalized number ± 1-254 anything ± 1-2046 anything ± floating point number ± 255 255 0 0 ± 2047 2047 0 0 ± infinity i fi it 255 nonzero 2047 nonzero not a number (NaN) CPE 232 MIPS Arithmetic 18