ConTExT A Generic Approach for Mitigating Spectre Michael Schwarz, Moritz Lipp, Claudio Canella, Robert Schilling, Florian Kargl, Daniel Gruss February 26, 2020 Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at 1 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at Transient cause 2 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at Meltdown-NM-REG Meltdown-AC-LFB Meltdown-AC Meltdown-AC-LP Meltdown-US-L1 Meltdown-US Meltdown-US-LFB Meltdown-US-SB Meltdown-DE Meltdown-P-L1 Meltdown-P-LFB Meltdown-P Transient cause Meltdown-PF Meltdown-P-SB Meltdown-P-LP Meltdown-RW Meltdown-UD Meltdown-PK-L1 Meltdown-PK Meltdown-PK-SB Meltdown-type Meltdown-SS Meltdown-SM-SB Meltdown-MPX Meltdown-BR Meltdown-BND Meltdown-CPL-REG Meltdown-GP Meltdown-NC-SB Meltdown-AVX-SB Meltdown-AVX Meltdown-AVX-LP Meltdown-AD-LFB Meltdown-AD Meltdown-AD-SB Meltdown-TAA-LFB Meltdown-MCA Meltdown-TAA Meltdown-TAA-LP Meltdown-PRM-LFB Meltdown-TAA-SB Meltdown-UC-LFB 2 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at Meltdown-NM-REG Meltdown-AC-LFB Meltdown-AC Meltdown-AC-LP Meltdown-US-L1 Meltdown-US Meltdown-US-LFB PHT-CA-IP Cross-address-space Meltdown-US-SB Meltdown-DE PHT-CA-OP Spectre-PHT Meltdown-P-L1 PHT-SA-IP Same-address-space Meltdown-P-LFB PHT-SA-OP Meltdown-P Transient cause Meltdown-PF Meltdown-P-SB Meltdown-P-LP BTB-CA-IP Meltdown-RW Cross-address-space Meltdown-UD BTB-CA-OP Meltdown-PK-L1 Spectre-BTB Meltdown-PK Meltdown-PK-SB Spectre-type Meltdown-type Meltdown-SS Meltdown-SM-SB BTB-SA-IP Same-address-space BTB-SA-OP Meltdown-MPX Meltdown-BR Meltdown-BND RSB-CA-IP Cross-address-space RSB-CA-OP Spectre-RSB Meltdown-CPL-REG Spectre-STL Meltdown-GP Meltdown-NC-SB RSB-SA-IP Same-address-space Meltdown-AVX-SB Meltdown-AVX RSB-SA-OP Meltdown-AVX-LP Meltdown-AD-LFB Meltdown-AD Meltdown-AD-SB Meltdown-TAA-LFB Meltdown-MCA Meltdown-TAA Meltdown-TAA-LP Meltdown-PRM-LFB Meltdown-TAA-SB Meltdown-UC-LFB 2 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Transient Execution Attacks www.tugraz.at Meltdown-NM-REG Meltdown-AC-LFB Meltdown-AC Meltdown-AC-LP Meltdown-US-L1 Meltdown-US Meltdown-US-LFB PHT-CA-IP Cross-address-space Meltdown-US-SB Meltdown-DE PHT-CA-OP Spectre-PHT Meltdown-P-L1 PHT-SA-IP Same-address-space Meltdown-P-LFB PHT-SA-OP Meltdown-P Transient cause Meltdown-PF Meltdown-P-SB Meltdown-P-LP BTB-CA-IP Meltdown-RW Cross-address-space Meltdown-UD BTB-CA-OP Meltdown-PK-L1 Spectre-BTB Meltdown-PK Meltdown-PK-SB Spectre-type Meltdown-type Meltdown-SS Meltdown-SM-SB BTB-SA-IP Same-address-space BTB-SA-OP Meltdown-MPX Meltdown-BR Meltdown-BND RSB-CA-IP Cross-address-space RSB-CA-OP Spectre-RSB Meltdown-CPL-REG Spectre-STL Meltdown-GP Meltdown-NC-SB RSB-SA-IP Same-address-space Meltdown-AVX-SB Meltdown-AVX RSB-SA-OP Meltdown-AVX-LP Meltdown-AD-LFB Meltdown-AD Meltdown-AD-SB Meltdown-TAA-LFB Meltdown-MCA Meltdown-TAA Meltdown-TAA-LP Meltdown-PRM-LFB Meltdown-TAA-SB Meltdown-UC-LFB 2 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Attacks www.tugraz.at PHT-CA-IP Cross-address-space PHT-CA-OP Spectre-PHT PHT-SA-IP Same-address-space PHT-SA-OP BTB-CA-IP Cross-address-space BTB-CA-OP Spectre-BTB Spectre-type BTB-SA-IP Same-address-space BTB-SA-OP RSB-CA-IP Cross-address-space RSB-CA-OP Spectre-RSB Spectre-STL RSB-SA-IP Same-address-space RSB-SA-OP 3 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at operation #n time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at operation #n prediction time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at operation #n prediction CF/DF predict operation #n+2 time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at operation #n prediction CF/DF predict operation #n+2 possibly transient execution architectural time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at retire operation #n prediction CF/DF predict operation #n+2 possibly transient execution architectural time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at retire operation #n flush pipeline on wrong prediction retire prediction CF/DF predict operation #n+2 possibly transient execution architectural time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Root Cause www.tugraz.at retire operation #n flush pipeline on wrong prediction retire prediction CF/DF predict retire operation #n+2 possibly transient execution architectural time 4 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre www.tugraz.at 5 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Gadget www.tugraz.at if(x < array_len) { y = oracle[array[x] * 4096]; } 6 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Spectre Gadget Illustrated www.tugraz.at x = 4 if (x < 4) then else Speculate Memory Oracle A B D array[0] C D E A array[1] {} oracle[array[x]] F G H T array[2] K J K I K A array[3] K L M N O P Q E Y R S T K U V W · · · X Y Z 7 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Unprotected Execution www.tugraz.at Unprotected cmp rdi, .array len jbe .else mov (rax + rdi),al shl 12,rax and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 8 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Unprotected Execution www.tugraz.at Unprotected cmp rdi, .array len Bounds check jbe .else mov (rax + rdi),al shl 12,rax and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 8 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Unprotected Execution www.tugraz.at Unprotected cmp rdi, .array len Bounds check jbe .else Access out-of-bounds array[x] mov (rax + rdi),al shl 12,rax and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 8 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Unprotected Execution www.tugraz.at Unprotected cmp rdi, .array len Bounds check jbe .else Access out-of-bounds array[x] mov (rax + rdi),al shl 12,rax Secret in rax and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 8 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Unprotected Execution www.tugraz.at Unprotected cmp rdi, .array len Bounds check jbe .else Access out-of-bounds array[x] mov (rax + rdi),al shl 12,rax Secret in rax and 0xff000,eax Access secret-dependent memory location mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 8 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Fixed Spectre Gadget www.tugraz.at if(x < array_len) { asm volatile("lfence"); y = oracle[array[x] * 4096]; } 9 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Memory Barriers www.tugraz.at Serializing Barrier cmp rdi, .array len jbe .else lfence mov (rax + rdi),al stall shl 12,rax not executed 1 and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 10 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Memory Barriers www.tugraz.at Serializing Barrier cmp rdi, .array len Bounds check jbe .else Stop speculation lfence mov (rax + rdi),al stall shl 12,rax not executed 1 and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 10 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Memory Barriers www.tugraz.at Serializing Barrier cmp rdi, .array len Bounds check jbe .else Stop speculation lfence Cannot access out-of-bounds array[x] mov (rax + rdi),al stall shl 12,rax not executed 1 and 0xff000,eax mov (rdx + rax),al mov 0,rax retq mov rax,(rsp + 8) 10 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Performance Impact www.tugraz.at • 62 % – 74.8 % overhead 11 Michael Schwarz (@misc0110) et al. — Graz University of Technology
Performance Impact www.tugraz.at • 62 % – 74.8 % overhead • Additional overhead for other Spectre variants 5 % – 50 % 11 Michael Schwarz (@misc0110) et al. — Graz University of Technology
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