Digitizing the Analog World: Challenges and Opportunities April 12, 2010 Boris Murmann murmann@stanford.edu Murmann Murmann Mixed-Signal Group Mixed-Signal Group
Murmann Mixed-Signal Group 2
Research Overview Digital enhancement MEMS Sensor Biomolecule algorithms interfaces detection Signal A/D Conditioning Transducers, Signal Antennas, Processing Spin-Valve Cables, ... Signal D/A Conditioning High-performance and low- power A/D and D/A Neural converters prosthetics Medical ultrasound 3
Research Examples High-performance A/D converters Neural prosthetics MEMS accelerometers Large area electronics 4
Digitally Assisted A/D Converters Additional digital processing for performance enhancement Signal A/D Conditioning Analog Media Signal CLK Processing and Transducers Signal D/A Conditioning Analog Digital 5
ADC for a “Digital” Serial Link No analog error accumulation and better scalability Need efficient high-speed ADC, typically > 10GS/s 6
Time-Interleaving Popular way to increase ADC throuhgput text 1 ADC 1 2 ADC 2 X(t) Y[n] N ADC N 7
Imperfections Mismatches result in signal distortion Gain Offset Timing Skew 1 text V off_1 ADC 1 G 1 2 V off_2 ADC 2 G 2 X(t) Y[n] N V off_N ADC N G N 8
Our Focus: Timing Skew (2-channel example) 1 2 9
Skew Calibration Using Extra ADC Statistics-based skew measurement in digital backend Correction through analog adjustments 1 ADC 1 2 ADC 2 Y[n] 1 2 X(t) N ADC N Digital Backend Clock Cal Digitally adjustable ADC Cal delay cells 10
Timing of Auxiliary ADC Phase 1 2 N Cal 1 1 ADC 1 2 2 ADC 2 Y[n] 1 2 N X(t) N N ADC N Digital Backend Clock Cal Cal ADC Cal 11
Calibration Scheme For each channel, adjust delay cells until correlation between calibration ADC output and each slice are maximized ADC Cal can be 1- bit and “slow” R( ) 1 ADC 1 2 ADC 2 Y[n] 1 2 X(t) N ADC N Max Clock Cal ADC Cal 12
Removed pre- publication experimental data… 13
MEMS Accelerometer CMOS Capacitance change ~10 fF/g Desired resolution ~10 mg for airbags and ESP Must resolve capacitance changes of ~100 aF Problem: Drift in parasitic bondwire capacitance 14
Sigma-Delta Interface Mechanical V F V a C x V S/H 1 Out C Lead Dig IN mech A m Decimator C V x 2 Compensator ms bs k Force- Balancing M. Lemkin and B. E. Boser, “A three -axis micromachined accelerometer with a CMOS position-sense interface and digital offset- trim electronics,“ IEEE J. Solid-State Circuits , vol. 34, pp. 456-468, April 1999. 15
Offset Offset due to bond wire deformation C Offset F a 1 C V S/H x mech C IN Lead A m C V x 2 Compensator ms bs k Force- Balancing 16
Linear Feedback System with Two Inputs x 2 y x 1 + _ a + b f 1 1 y x x 1 2 f af 17
Spring Constant Modulation The output due to C off can be modulated to higher frequencies by modulating the spring constant k 1 k k V F C Out mech Off C FB FB x C Offset F a 1 C V S/H x mech C IN Lead A m C V x 2 Compensator ms bs k Force- Balancing 18
Spring softening effect Acceleration Acceleration Spring Spring Electrostatic _ _ + _ _ + _ _ + _ _ + Can be used to modulate spring constant (k) 19
Modulation through Multiplexed Feedback F a V C x V S/H 1 C mech IN Out A m Int Com Decimator C V x 2 ms bs k k m x f k PULSE Electrostatic Force Time-Multiplexed MOD Force-Balancing MOD Force-Balancing T T 20
Output Spectrum with 1-Tone Modulation 0 0 0 -20 -20 -20 -32 dB DC Offset Power/frequency (dB/Hz) Power/frequency (dB/Hz) Power/frequency (dB/Hz) -40 -40 -40 -46 dB Acceleration Capacitance -60 -60 -60 9.1 m/s^2 0 fF -80 -80 -80 9.1 m/s^2 10 fF -89 dB -100 -100 -100 9.1 m/s^2 50 fF -120 -120 -120 -140 -140 -140 -160 -160 -160 -6 -6 -6 -5 -5 -5 -4 -4 -4 -3 -3 -3 -2 -2 -2 -1 -1 -1 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 Frequency (MHz) Frequency (MHz) Frequency (MHz) 21
Pseudo-Random Modulation Modulating spring-constant with a pseudo-random sequence -20 -40 Output Spectrum [dB] -60 -80 -100 -120 -140 0 2 4 6 10 10 10 10 Frequency [Hz] 22
Parameter Convergence Closed-loop system - Feeding back capacitance 1.2 Feedback signal [x10 -15 ] 1 0.8 Coff=0fF Coff=0.01fF 0.6 Coff=0.1fF 0.4 Coff=1fF 0.2 0 -0.2 0 0.5 1 1.5 2 Time [Sec] 23
Chip Design in Progress D Out FPGA Correlator Decimator MEMS CMOS C to V Integrator Compensator Quantizer V Out Clk State- Machine Electrostatic Feedback k-modulation V Ref Gnd Scan In/Out 24
Neural Prosthetics Cortical motor prosthetics Neurons in the motor cortical areas of the brain encode information about intended movement Courtesy L.R. Hochberg 25 Courtesy K.V. Shenoy Nature Magazine June ‘06
Neural Signal Acquisition Electrode signals consist of multiple sources DC Offset, about 15mV from electrode/tissue interface Local field potential (LFP), ≤3mV peak, 10Hz to 100Hz Spikes from nearby neurons, 35 μ V – 1mV peak, 500Hz to 5kHz Courtesy M. Sahani Courtesy C.L. Klaver 26
Specs Separate the fast and slow signal acquisition for DR Custom front end design for each path Spikes Local Field Potential Gain 600 V/V 200 V/V Lower Cutoff 300Hz 1Hz Upper Cutoff 10kHz 1kHz Input Referred Noise 2.0µVrms 1.0µVrms in 10-100Hz (total from sampling node) Total Power (96x Array) 3mW 100µW 27
Spike Path Front-End SAR ADC Input Cap Output Input Stage Buffers SC Bandpass Filter 28
Sampling Phase Integrate signal current on C B and sample High-pass for DC block using C ac and R big (off- resistance) A 1 contains a pole that helps minimize noise folding 29
A1 Implementation Details I TAIL I<< I TAIL V outp V outm M 1a M 1b V B2 V B1 Anti-alias for thermal noise Flicker noise from M 1a,b reduction 30
Static Power 31
Two-Channel Interface Pixel SAR ADC Frontend 32
Die Photo (96 channels, 5mm x 5mm) 33
The Future? 34
Organic Semiconductors Mechanically flexible Suitable for solution processing Cover large areas at low cost Make disposable devices 35
Orbital Energy Levels of Pentacene LUMO 22 carbon atoms Unoccupied (lowest unoccupied molecular orbital) 22 π orbitals ~3 eV ~5 eV HOMO Occupied (highest occupied molecular orbital) [Slide by Hagen Klauk]
P-Channel Transistor ~3 eV LUMO ~5 eV HOMO Au Au [Slide by Hagen Klauk]
Active Matrix OLED Displays http://www.youtube.com/watch?v=f8S8tbQMp2k&NR=1 38
Jellyfish Autonomous Node http://muri.mse.vt.edu/ 39
Jellyfish Bell Prototype (Virginia Tech) A bio-inspired shape memory alloy composite (BISMAC) actuator A .A .Villanueva, et al. , 2010 Smart Mater. Struct. 19 025013 (17pp) 40
Want to Make Plastic ADCs ! 41
6-bit A/D Converter Prototype Substrate Glass Interconnect Ti/Au evaporation, litho, wet etch Gate electrodes Al evaporation, shadow masking Source/Drain Au Evaporation, shadow masking Dielectric 5.7nm AlO x /SAM PFET DNTT, ~0.5 cm 2 /Vs NFET F 16 CuPc, ~0.02 cm 2 /Vs Area 28mm x 22mm Component count 74 W. Xiong , U. Zschieschang, H. Klauk, and B. Murmann, “A 3V, 6b Successive Approximation ADC using Complementary Organic Thin-Film Transistors on Glass,” ISSCC 2010. 42
Organic TFTs: Air Stability 10 stored and Hole mobility (cm 2 /Vs) tested in air S 1 S dinaphto-thieno-thiophene (DNTT) O 0.1 air O 0 30 60 90 120 150 pentacene Exposure to air (days) [Slide by Hagen Klauk] Yamamoto, J. Am. Chem. Soc. 129 2224 (2007) Klauk, Adv. Mater. 19 3882 (2007) Zschieschang, Adv. Mater. 22 982 (2010) Zschieschang, MRS Spring Meeting II-7.12 (2010)
ADC Schematic Output SAR Logic Calibration enables 6-bit (off-chip) To DAC precision despite poorly matched capacitors Calibration DAC V REFP V MID V REFN C-2C structure possible due DAC with Comparator Sampler small stray caps (glass) C/32 C/32 C/32 ... Bit 0 Bit 1 Bit 2, 3, 4 Bit 5 2C 2C C C C C V REFN V REFP V REFN V REFP V REFN V REFP V REFN V MID ... Input Main DAC 44
Comparator CLK CLK CLK CLK Auto-zeroing cancels threshold voltage drift CLK CLK CLK CLK C S1 C S2 C S3 C S4 C F1 C F2 C F3 C F4 - + Input Output C gdp C gdn Anti-parallel PFET/NFET layout minimizes variations if C F due to misalignment 45
Measured DNL/INL Before calibration, 100 Hz clock rate 4 2 DNL (LSB) 0 -2 -4 0 8 16 24 32 40 48 56 63 Code 4 2 INL (LSB) 0 -2 -4 0 8 16 24 32 40 48 56 63 Code 46
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