Towards Scalable SoC Security Validation Sujit Kumar Muduli Indian Institute of Technology, Kanpur
Objective Proving confidentiality and integrity show execution traces are indistinguishable to untrusted entity Instance 1 Instance 2 AES Engine AES Engine ROM ROM π«π³ππ π π«π³ππ π RAM RAM Host Host π± π± MMU MMU Interface Interface πππ (π½, π·πΏππ§ 6 ) π = ( π ... ππ« ππ« Access Access control control β "#$ % ... πππ (π½, π·πΏππ§ 8 ) π = ( π (Not secure) Indistinguishability Test Goal : automated technique for finding 2-safety hyperproperty violations
Challenges System Security 1. Specifying properties for end-to-end security. Model Specification 2. Specification and Model must capture adversarial effects. Instrumented 3. Scalability issue in verification process. RTL Test input Simulation Engine Whitebox Symbolic simulation β’ Fuzzing β’ Verilog simulation Coverage info Trace Analyzer security violation A semi-formal technique to find 2-safety violations
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