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Optimization (Karnaugh maps) a b c d e 0 0 0 0 0 0 0 0 - PowerPoint PPT Presentation

Optimization (Karnaugh maps) a b c d e 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 1 0 1 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0


  1. Designing Circuits input output a b c d 0 0 0 0 0 1 1 0 c = (a’ ⋅ b ) + (a ⋅ b’) 1 0 1 0 1 1 0 1 step 3. combine, two at a time, sub-expressions with an or

  2. Designing Circuits input output a b c d 0 0 0 0 0 1 1 0 c = (a’ ⋅ b ) + (a ⋅ b’) d = a ⋅ b 1 0 1 0 1 1 0 1 step 3. combine, two at a time, sub-expressions with an or

  3. Designing Circuits a (a ⋅ b) d ⋅ b d = a ⋅ b step 4. draw circuit diagram

  4. Designing Circuits c = (a’ ⋅ b) + (a ⋅ b’) (a’ ⋅ b) ⋅ a c + ⋅ (a ⋅ b’) d ⋅ b step 4. draw circuit diagram

  5. Designing Circuits c = (a’ ⋅ b ) + (a ⋅ b’) (a’ ⋅ b) ⋅ a c + ⋅ (a ⋅ b’) d ⋅ b step 4. draw circuit diagram

  6. Designing Circuits step 1. build truth-table for all possible input/output values step 2. build sub-expressions with and/not for each output column step 3. combine, two at a time, sub-expressions with an or step 4. draw circuit diagram

  7. 1-Bit Compare for Equality (CE) If two bits a, b are equal then return 1 else return 0

  8. 1-Bit Compare for Equality (CE) input output a b c 0 0 0 1 1 0 1 1

  9. 1-Bit Compare for Equality (CE) input output a b c 0 0 1 0 1 0 1 0 0 1 1 1

  10. 1-Bit Compare for Equality (CE) input output sub- a b c expression 0 0 1 0 1 0 1 0 0 1 1 1

  11. 1-Bit Compare for Equality (CE) input output sub- a b c expression a’ ⋅ b’ 0 0 1 0 1 0 1 0 0 a ⋅ b 1 1 1

  12. 1-Bit Compare for Equality (CE) input output sub- a b c expression a’ ⋅ b’ 0 0 1 0 1 0 1 0 0 a ⋅ b 1 1 1 c = (a’ ⋅ b’) + (a ⋅ b)

  13. 1-Bit Compare for Equality (CE) input output a b c c = (a’ ⋅ b’) + (a ⋅ b)

  14. 1-Bit Compare for Equality (CE) input output a (a ⋅ b) ⋅ b c c = (a’ ⋅ b’) + (a ⋅ b)

  15. 1-Bit Compare for Equality (CE) input output a (a ⋅ b) ⋅ b c (a’ ⋅ b’) ⋅ c = (a’ ⋅ b’) + (a ⋅ b)

  16. 1-Bit Compare for Equality (CE) input output a (a ⋅ b) ⋅ b (a’ ⋅ b’)+(a ⋅ b) c + (a’ ⋅ b’) ⋅ c = (a’ ⋅ b’) + (a ⋅ b)

  17. 4-Bit Compare for Equality (CE) If two 4-bit numbers are equal then return 1 else return 0

  18. 4-Bit Compare for Equality (CE) If two 4-bit numbers are equal then return 1 else return 0 a 3 a 2 a 1 a 0 == b 3 b 2 b 1 b 0

  19. 4-Bit Compare for Equality (CE) input output a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 c how many rows?

  20. 4-Bit Compare for Equality (CE) 256

  21. 4-Bit Compare for Equality (CE) two 4-bit numbers are equal if: a 3 == b 3 and a 2 == b 2 and a 1 == b 1 and a 0 == b 0 a 3 a 2 a 1 a 0 == b 3 b 2 b 1 b 0

  22. 4-Bit Compare for Equality (CE) a (a ⋅ b) ⋅ b (a’ ⋅ b’)+(a ⋅ b) c + (a’ ⋅ b’) ⋅

  23. 4-Bit Compare for Equality (CE) a (a ⋅ b) ⋅ b (a’ ⋅ b’)+(a ⋅ b) c + (a’ ⋅ b’) ⋅ a c 1-CE b

  24. 4-Bit Compare for Equality (CE) input output a 3 b 3 a 2 b 2 a 1 b 1 a 0 c b 0

  25. 4-Bit Compare for Equality (CE) input output a 3 1-CE b 3 a 2 b 2 a 1 b 1 a 0 c b 0

  26. 4-Bit Compare for Equality (CE) input output a 3 1-CE b 3 a 2 1-CE b 2 a 1 1-CE b 1 a 0 c 1-CE b 0

  27. 4-Bit Compare for Equality (CE) input output a 3 1-CE b 3 a 2 ⋅ 1-CE b 2 a 1 1-CE b 1 a 0 c 1-CE b 0

  28. 4-Bit Compare for Equality (CE) input output a 3 1-CE b 3 a 2 ⋅ 1-CE b 2 a 1 ⋅ 1-CE b 1 a 0 c 1-CE b 0

  29. 4-Bit Compare for Equality (CE) input output a 3 1-CE b 3 a 2 ⋅ 1-CE b 2 a 1 ⋅ 1-CE b 1 a 0 c ⋅ 1-CE b 0

  30. 1-Bit Adder build a circuit that adds two 1-bit numbers

  31. 1-Bit Adder 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = ?

  32. 1-Bit Adder 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 need to carry

  33. 1-Bit Adder 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 input: two digits a, b

  34. 1-Bit Adder 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 input: two digits a, b and a carry c

  35. 1-Bit Adder 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 output: sum d and carry e

  36. 1-Bit Adder 101 2 2 +2 0 5 001 2 0 1 --- --- 6

  37. 1-Bit Adder 1 101 5 001 1 --- --- 0 6

  38. 1-Bit Adder 1 101 5 001 1 --- --- 10 6

  39. 1-Bit Adder 1 101 5 001 1 --- --- 110 6

  40. 1-Bit Adder 1 101 5 001 1 --- --- 110 6 2 2 +2 1

  41. 1-Bit Adder input : digits a, b and carry c output : sum d and carry e

  42. 1-Bit Adder a b c d e 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  43. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  44. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  45. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  46. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  47. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  48. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 1 1 1 input : digits a, b and carry c output : sum d and carry e

  49. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 input : digits a, b and carry c output : sum d and carry e

  50. 1-Bit Adder a b c d e 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 input : digits a, b and carry c output : sum d and carry e

  51. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  52. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  53. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  54. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  55. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 0 1 1 0 1 a ⋅ b’ ⋅ c’ 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

  56. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 0 1 1 0 1 a ⋅ b’ ⋅ c’ 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 a ⋅ b ⋅ c 1 1 1 1 1

  57. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 a’ ⋅ b ⋅ c 0 1 1 0 1 a ⋅ b’ ⋅ c’ 1 0 0 1 0 a ⋅ b’ ⋅ c 1 0 1 0 1 a ⋅ b ⋅ c’ 1 1 0 0 1 a ⋅ b ⋅ c a ⋅ b ⋅ c 1 1 1 1 1

  58. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 a’ ⋅ b ⋅ c 0 1 1 0 1 a ⋅ b’ ⋅ c’ 1 0 0 1 0 a ⋅ b’ ⋅ c 1 0 1 0 1 a ⋅ b ⋅ c’ 1 1 0 0 1 a ⋅ b ⋅ c a ⋅ b ⋅ c 1 1 1 1 1 d = (a’ ⋅ b’ ⋅ c) + (a’ ⋅ b ⋅ c’) + (a ⋅ b’ ⋅ c’) + (a ⋅ b ⋅ c)

  59. 1-Bit Adder sub-expressions sub-expressions a b c d e (d) (e) 0 0 0 0 0 a’ ⋅ b’ ⋅ c 0 0 1 1 0 a’ ⋅ b ⋅ c’ 0 1 0 1 0 a’ ⋅ b ⋅ c 0 1 1 0 1 a ⋅ b’ ⋅ c’ 1 0 0 1 0 a ⋅ b’ ⋅ c 1 0 1 0 1 a ⋅ b ⋅ c’ 1 1 0 0 1 a ⋅ b ⋅ c a ⋅ b ⋅ c 1 1 1 1 1 e = (a’ ⋅ b ⋅ c) + (a ⋅ b’ ⋅ c) + (a ⋅ b ⋅ c’) + (a ⋅ b ⋅ c)

  60. 1-Bit Adder a’ ⋅ b’ ⋅ c d e a b c

  61. 4-Bit Adder build a circuit that adds two 4-bit numbers

  62. 4-Bit Adder carry-in c a d digits 1-ADD sum b e carry-out

  63. 4-Bit Adder a 0 d 0 1-ADD a 1 c 0 a 2 a 3 b 0 b 1 b 2 b 3

  64. 4-Bit Adder 0 a 0 d 0 1-ADD a 1 c 0 a 2 a 3 b 0 b 1 b 2 b 3

  65. 4-Bit Adder 0 a 0 d 0 1-ADD a 1 c 0 a 2 a 3 d 1 1-ADD c 1 b 0 b 1 b 2 b 3

  66. 4-Bit Adder 0 a 0 d 0 1-ADD a 1 c 0 a 2 a 3 d 1 1-ADD c 1 d 2 1-ADD c 2 b 0 b 1 b 2 b 3

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