Nanowire- -Based Based Nanowire Programmable Programmable - PowerPoint PPT Presentation

Nanowire- -Based Based Nanowire Programmable Programmable Architectures Architectures ANDR´ ´E DEHON E DEHON ANDR ACM Journal on Emerging Technologies in ACM Journal on Emerging Technologies in Computing Systems, Vol. 1, No. 2, July 2005, Computing Systems, Vol. 1, No. 2, July 2005, Pages 109– –162 162 Pages 109

INTRODUCTION INTRODUCTION Goal : to develop to develop nanowire nanowire- -based based � Goal : � architectures which can bridge between architectures which can bridge between lithographic and atomic- -scale feature sizes scale feature sizes lithographic and atomic and tolerate defective and stochastic and tolerate defective and stochastic assembly of regular arrays assembly of regular arrays � Using 10nm pitch Using 10nm pitch nanowires nanowires, these , these � nanowire- -based programmable architectures based programmable architectures nanowire offer one to two orders of magnitude greater one to two orders of magnitude greater offer mapped- -logic density logic density than defect than defect- -free free mapped lithographic FPGAs FPGAs at 22nm at 22nm lithographic

INTRODUCTION INTRODUCTION � Do we have an Do we have an adequate set of adequate set of � capabilities to build logic? to build logic? capabilities � How do we How do we cope with the regularity cope with the regularity � demanded by bottom by bottom- -up assembly? up assembly? demanded � How do we How do we accommodate the high defect accommodate the high defect � rates and statistical assembly which which rates and statistical assembly accompany bottom- -up assembly up assembly accompany bottom techniques? techniques? � How do we How do we organize and interconnect organize and interconnect � these atomic- -scale building blocks? scale building blocks? these atomic

INTRODUCTION INTRODUCTION � How do we How do we address address nanowires nanowires from the from the � lithographic scale for testing, configuration, for testing, configuration, lithographic scale and IO? and IO? � How do we get How do we get logic restoration and logic restoration and � inversion? inversion? � What What net benefit net benefit do these building blocks do these building blocks � offer us? offer us?

TECHNOLOGY TECHNOLOGY � Nanowires Nanowires � � Atomic Atomic- -scale scale nanowires nanowires can be engineered to can be engineered to � have a variety of conduction properties variety of conduction properties from from have a insulating to semiconducting semiconducting to metallic to metallic insulating to � Growth. Growth. Semiconducting Semiconducting nanowires nanowires ( (NWs NWs) ) � can be grown to controlled dimensions controlled dimensions on the on the can be grown to nanometer scale using seed catalysts (e.g., nanometer scale using seed catalysts (e.g., gold balls) to define their diameter gold balls) to define their diameter � NWs NWs with diameters down to 3nm have been with diameters down to 3nm have been � demonstrated demonstrated

TECHNOLOGY TECHNOLOGY � Figure demonstrates growth of Figure demonstrates growth of Si Si NWs NWs �

TECHNOLOGY TECHNOLOGY � Field Field- -Effect Control Effect Control. . By controlling the mix of By controlling the mix of � elements in the environment during growth, elements in the environment during growth, semiconducting NWs NWs can be doped can be doped to control to control semiconducting their electrical properties their electrical properties � Heavily doped Heavily doped NWs NWs are conducting. are conducting. � Conduction through lightly doped NWs NWs can be can be Conduction through lightly doped controlled via an electrical field like Field- - controlled via an electrical field like Field Effect Transistors Effect Transistors � Off resistances ( Off resistances ( Roff Roff fet ) can be over 10Gs and fet ) can be over 10Gs and � on resistances ( Ron Ron fet ) under 0.1M; off/on on resistances ( fet ) under 0.1M; off/on resistance ratios are at least 10 4 4 resistance ratios are at least 10

TECHNOLOGY TECHNOLOGY � Axial Profile Axial Profile. . The doping profile or material The doping profile or material � composition along the length of a NW can be composition along the length of a NW can be controlled, This allows us to construct wires controlled, This allows us to construct wires which are gateable gateable in some regions but not in some regions but not which are gateable in others in others gateable

TECHNOLOGY TECHNOLOGY � Radial Profile Radial Profile. . environmental conditions are environmental conditions are � changed to allow atomic layers to grow over atomic layers to grow over changed to allow the entire surface of the NW of the NW the entire surface � This allows us to sheath This allows us to sheath NWs NWs in insulators in insulators � (e.g., SiO2) to control spacing between (e.g., SiO2) to control spacing between conductors and between gated wires and conductors and between gated wires and control wires control wires � After a NW has been grown, it can be After a NW has been grown, it can be � converted into a metal silicide silicide converted into a metal

TECHNOLOGY TECHNOLOGY � Assembly Assembly � � Langmuir Langmuir- -Blodgett (LB) flow Blodgett (LB) flow techniques can techniques can � be used to align a set of NWs NWs into a single into a single be used to align a set of orientation, close pack them, and transfer orientation, close pack them, and transfer them onto a surface them onto a surface

TECHNOLOGY TECHNOLOGY � The LB step can be rotated and repeated so The LB step can be rotated and repeated so � that we get multiple layers of NWs NWs such as such as that we get multiple layers of crossed NWs NWs for building a crossbar array or for building a crossbar array or crossed memory core memory core � Crosspoints Crosspoints � � Many technologies have been demonstrated Many technologies have been demonstrated � for nonvolatile, switched nonvolatile, switched crosspoints crosspoints. . for Common features include: Common features include: • resistance which changes significantly resistance which changes significantly • between on and off states between on and off states

TECHNOLOGY TECHNOLOGY • the ability to be made rectifying; the ability to be made rectifying; • • the ability to turn the device on or off by the ability to turn the device on or off by • applying a voltage differential across the applying a voltage differential across the junction; junction; • the ability to be placed within the area of a the ability to be placed within the area of a • crossed NW junction crossed NW junction � A typical, CMOS switch might be 2500 A typical, CMOS switch might be 2500 λ λ 2 2 � [DeHon DeHon 1996], compared to a 5 1996], compared to a 5 λ λ × × 5 5 λ λ bottom bottom [ level metal wire crossing, making the level metal wire crossing, making the crosspoint 100 100× × the area of the wire crossing the area of the wire crossing crosspoint

CHALLENGES CHALLENGES � As we approach the atomic As we approach the atomic- -scale, Precise scale, Precise � location of atoms becomes relevant location of atoms becomes relevant � Variations occur due to statistical doping and Variations occur due to statistical doping and � dopant placement placement dopant � Perfect repeatability may be extremely difficult Perfect repeatability may be extremely difficult � or infeasible for these feature sizes or infeasible for these feature sizes � These These bottom bottom- -up approaches up approaches, in contrast, , in contrast, � promise us finer feature sizes that are promise us finer feature sizes that are controlled by physical phenomena but do not controlled by physical phenomena but do not promise perfect, deterministic alignment in promise perfect, deterministic alignment in three dimensions three dimensions

CHALLENGES CHALLENGES � This leads us to ask if we can reasonably give This leads us to ask if we can reasonably give � up our perfect correlation and complete up our perfect correlation and complete design freedom in three dimensions in order design freedom in three dimensions in order to exploit smaller feature sizes to exploit smaller feature sizes � Regular Assembly Regular Assembly � � The assembly techniques suggest that The assembly techniques suggest that we we � can build regular arrays at tight pitch with both with both can build regular arrays at tight pitch NW trace width and trace spacing using NW trace width and trace spacing using controlled NW diameters controlled NW diameters

CHALLENGES CHALLENGES � we cannot deterministically differentiate we cannot deterministically differentiate � features at this scale, that is, we cannot make we cannot make features at this scale, that is, one particular crosspoint crosspoint be different be different in some in some one particular way from the other crosspoints crosspoints in the array in the array way from the other � Nanowire Nanowire Lengths Lengths � � NWs NWs can be grown to hundreds of microns can be grown to hundreds of microns � � However, at this high length to diameter ratio, However, at this high length to diameter ratio, � they become highly susceptible to bending they become highly susceptible to bending and ultimately breaking and ultimately breaking