1 0 0 1 0 Exploiting Half-Wits: Smarter Storage for Low-Power Devices Mastooreh (Negin) Salajegheh, Yue Wang Kevin Fu, Andrew Jiang, Erik Learned-Miller Supported in part by a Sloan Research Fellowship and NSF CCF-0747415, CNS-0627476, CNS-0627529, CNS-0845874, CNS-0923313, ECCS-0802107. Any opinions, findings, and conclusions expressed in this material are those of the authors and do not necessarily reflect the views of the NSF. Friday, March 4, 2011
figure: treehugger.com Mastooreh Salajegheh, USENIX FAST ’11 2 Friday, March 4, 2011
figure: treehugger.com Mastooreh Salajegheh, USENIX FAST ’11 2 Friday, March 4, 2011
Storage on Embedded Devices Mastooreh Salajegheh, USENIX FAST ’11 3 Friday, March 4, 2011
Storage on Embedded Devices >$10 billion Mastooreh Salajegheh, USENIX FAST ’11 3 Friday, March 4, 2011
Storage on Embedded Devices >$10 billion Mastooreh Salajegheh, USENIX FAST ’11 3 Friday, March 4, 2011
Storage on Embedded Devices >$10 billion Mastooreh Salajegheh, USENIX FAST ’11 4 Friday, March 4, 2011
On-chip Flash Mastooreh Salajegheh, USENIX FAST ’11 5 Friday, March 4, 2011
On-chip Flash Microcontroller with 8KB Embedded Flash Memory Mastooreh Salajegheh, USENIX FAST ’11 5 Friday, March 4, 2011
On-chip Flash 2.2 V vs. 4.5 V Microcontroller with 8KB Embedded Flash Memory Mastooreh Salajegheh, USENIX FAST ’11 5 Friday, March 4, 2011
Ideal CPU Flash 2.2 V 4.5 V Energy ∝ Workload Mastooreh Salajegheh, USENIX FAST ’11 6 Friday, March 4, 2011
Ideal Actual CPU CPU Flash Flash 2.2 V 4.5 V 4.5 V Energy ∝ Worst case Energy ∝ Workload Mastooreh Salajegheh, USENIX FAST ’11 6 Friday, March 4, 2011
Goal of this work • To reduce the wasted energy consumption for embedded storage. Mastooreh Salajegheh, USENIX FAST ’11 7 Friday, March 4, 2011
Contribution • Software for using flash memory at low voltage - Quantifying the impact on reliability - Measuring the energy savings Mastooreh Salajegheh, USENIX FAST ’11 8 Friday, March 4, 2011
State of the Art • Pick the highest voltage...Excessive power Mastooreh Salajegheh, USENIX FAST ’11 9 Friday, March 4, 2011
State of the Art • Pick the highest voltage...Excessive power • Add hardware...$$ Mastooreh Salajegheh, USENIX FAST ’11 9 Friday, March 4, 2011
State of the Art • Pick the highest voltage...Excessive power • Add hardware...$$ • Don’t use flash memory...Ugh! [Sample:08] I can’t remember a thing Mastooreh Salajegheh, USENIX FAST ’11 9 Friday, March 4, 2011
State of the Art • Pick the highest voltage...Excessive power • Add hardware...$$ • Don’t use flash memory...Ugh! [Sample:08] I can’t Voltage 4 remember a thing 2 0 [Ransford: ASPLOS11] 0 50 100 200 300 Time (ms) Mastooreh Salajegheh, USENIX FAST ’11 9 Friday, March 4, 2011
Our Approach Savings: Low-voltage Write to flash memory at low voltage. Mastooreh Salajegheh, USENIX FAST ’11 10 Friday, March 4, 2011
Our Approach Savings: Cost: Low-voltage Errors Write to flash How hard is it memory at low to correct the voltage. errors? Mastooreh Salajegheh, USENIX FAST ’11 10 Friday, March 4, 2011
Write once bits (Wits) [Rivest:82] Mastooreh Salajegheh, USENIX FAST ’11 11 figure: http://arcweb.archives.gov Friday, March 4, 2011
Partial Failure at Low Voltage • Example: 1111 1111 Initialized: Mastooreh Salajegheh, USENIX FAST ’11 12 Friday, March 4, 2011
Partial Failure at Low Voltage • Example: 1111 1111 Initialized: 1111 1100 Input: Mastooreh Salajegheh, USENIX FAST ’11 12 Friday, March 4, 2011
Partial Failure at Low Voltage • Example: 1111 1111 Initialized: 1111 1100 Input: Mastooreh Salajegheh, USENIX FAST ’11 12 Friday, March 4, 2011
Partial Failure at Low Voltage • Example: 1111 1111 Initialized: 1111 1100 Input: 1111 1101 Result: Mastooreh Salajegheh, USENIX FAST ’11 12 Friday, March 4, 2011
Partial Failure at Low Voltage • Example: 1111 1111 Initialized: 1111 1100 Input: Error 1111 1101 Result: Mastooreh Salajegheh, USENIX FAST ’11 12 Friday, March 4, 2011
Transitions at low voltage Z 1 1 • 1 → 0 might fail with P ≥ 0. • 1 → 1 never fails (P=0). 0 0 [Klove:95] Mastooreh Salajegheh, USENIX FAST ’11 13 Friday, March 4, 2011
What might influence the error rate Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
What might influence the error rate ✓ Operating voltage level Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
What might influence the error rate ✓ Operating voltage level ✓ Hamming weight of data Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
What might influence the error rate ✓ Operating voltage level ✓ Hamming weight of data ✓ Wear-out history Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
What might influence the error rate ✓ Operating voltage level ✓ Hamming weight of data ✓ Wear-out history - Neighbor cells Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
What might influence the error rate ✓ Operating voltage level ✓ Hamming weight of data ✓ Wear-out history - Neighbor cells - Permutation of 0s Mastooreh Salajegheh, USENIX FAST ’11 14 Friday, March 4, 2011
Mastooreh Salajegheh, USENIX FAST ’11 15 Friday, March 4, 2011
Test Platform Mastooreh Salajegheh, USENIX FAST ’11 15 Friday, March 4, 2011
Test Platform Monitor Mastooreh Salajegheh, USENIX FAST ’11 15 Friday, March 4, 2011
Voltage Supply Test Platform Monitor Mastooreh Salajegheh, USENIX FAST ’11 15 Friday, March 4, 2011
JTAG Voltage Supply Test Platform Monitor Mastooreh Salajegheh, USENIX FAST ’11 15 Friday, March 4, 2011
100 M 80 Error rate (%) C U - a 60 40 20 0 1.80 1.82 1.84 1.86 1.88 1.90 1.92 Operating Voltage (V) Mastooreh Salajegheh, USENIX FAST ’11 16 Friday, March 4, 2011
100 MCU-A M 80 Error rate (%) C s U p i h c - a o w e h T 60 l t e d f o o m e m a s 40 20 0 1.80 1.82 1.84 1.86 1.88 1.90 1.92 Operating Voltage (V) Mastooreh Salajegheh, USENIX FAST ’11 17 Friday, March 4, 2011
100 MCU-A M 80 Error rate (%) C U - a 60 MCU-B 40 20 MCU-b 0 1.80 1.82 1.84 1.86 1.88 1.90 1.92 Operating Voltage (V) Mastooreh Salajegheh, USENIX FAST ’11 18 Friday, March 4, 2011
Data Hamming Weight 100 Error rate(%) 50 0 0 1 2 3 4 5 6 7 8 Hamming weight Mastooreh Salajegheh, USENIX FAST ’11 19 Friday, March 4, 2011
Data Hamming Weight 100 Error rate(%) The heavier the better. 50 0 0 1 2 3 4 5 6 7 8 Hamming weight Mastooreh Salajegheh, USENIX FAST ’11 19 Friday, March 4, 2011
Voltage = 1.850 V Error (%) 100 12 rows (memory length) 80 60 40 20 0 128 bits (memory width) Mastooreh Salajegheh, USENIX FAST ’11 20 Friday, March 4, 2011
Voltage = 1.850 V Error (%) 100 12 rows (memory length) 80 60 More often used 40 20 0 128 bits (memory width) Mastooreh Salajegheh, USENIX FAST ’11 20 Friday, March 4, 2011
Accumulative Behavior Mastooreh Salajegheh, USENIX FAST ’11 figure: steynian.wordpress.com 21 Friday, March 4, 2011
Design of a Low-voltage Storage Mastooreh Salajegheh, USENIX FAST ’11 22 Friday, March 4, 2011
Modeling Flash Memory • A set of cells n • Cell state: < c 1 , ..., c n > • c i ∈ { 0 , 1 } • Initial state: ∀ i, c i = 1 • Update: set a subset of to 0 < c 1 , ..., c n > • Once then a write cannot c i = 0 c i ← 1 • Write Once Bits: Wits Mastooreh Salajegheh, USENIX FAST ’11 23 Friday, March 4, 2011
Modeling Flash Memory At low voltage: • might fail and remains . [Pavan:97] c i ← 0 1 c i • There might not be enough charge stored in a cell to represent a 0: Half-Wits 1 0 0 1 0 Mastooreh Salajegheh, USENIX FAST ’11 24 Friday, March 4, 2011
Design Goals Minimize: • Energy consumption • Error rate • Delay Mastooreh Salajegheh, USENIX FAST ’11 25 Friday, March 4, 2011
Proposed Techniques 1. In-place writes 2. Multiple-place writes 3. ReedSolomon-Berger Codes Mastooreh Salajegheh, USENIX FAST ’11 26 Friday, March 4, 2011
Negative Logic } Cell Initialization: 1 Mastooreh Salajegheh, USENIX FAST ’11 27 Friday, March 4, 2011
Negative Logic Charge } Cell ☺ Initialization: 1 Written: 0 Mastooreh Salajegheh, USENIX FAST ’11 27 Friday, March 4, 2011
1. In-place writes • Repeatedly attempt a write to the same location. Mastooreh Salajegheh, USENIX FAST ’11 28 Friday, March 4, 2011
1. In-place writes • Repeatedly attempt a write to the same location. • Example: One bit over time 1 Mastooreh Salajegheh, USENIX FAST ’11 28 Friday, March 4, 2011
1. In-place writes • Repeatedly attempt a write to the same location. • Example: One bit over time 1 → 0 1 Mastooreh Salajegheh, USENIX FAST ’11 28 Friday, March 4, 2011
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