Spring 2015 Week 3 Module 13 Digital Circuits and Systems Combinational Design Decoders + Encoders Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay
Combinational Circuits Combinational circuit is one in which output is only dependent on the current input. As a circuit you will not see any feedback loops Given the current inputs, one can analyze and say what the output must be Need not know past history of values Basic gates like AND, OR, NOT, NAND, NOR, XOR, XNOR are all combinational Combinational Design + Decoders/Encoders 5
Combinational Logic Design Understand the Problem: understand input/output behavior identify the inputs, outputs, and control signals draw a top level block diagram if necessary Formulate in a Standard Representation: truth tables or Boolean equations Choose an Implementation: discrete logic gates programmable logic devices: PAL, PLA, ROM, FPGA Apply the Design Procedure: follow the representation → minimization → implementation algorithm mechanically simulate your circuit before implementing it on actual devices implement it on actual devices and verify your implementation. Combinational Design + Decoders/Encoders 6
Example: Process Line Control Design a controller to select right length metal rods out of rods of varying length ( ± 10%) traveling one at a time on a conveyor belt. Rods that are within spec. ( ± 5%) remain on the belt. Rods that are too short or too long are discarded by mechanical arm(s). +10% +5% Spec -5% -10% Rod Rod Rod within too long too short spec Combinational Design + Decoders/Encoders 7
Example (contd…) too within too long spec short a b c Reject +10% 0 0 0 0 c +5% 0 0 1 0 Spec 0 1 0 0 b -5% 0 1 1 0 -10% too short 1 0 0 1 1 0 1 X in spec 1 1 0 0 a too long 1 1 1 1 bc a 00 01 11 10 0 1 1 X 1 Reje ct ab ac a b c Combinational Design + Decoders/Encoders 8
Building Blocks for Combinational Circuits Decoders Encoders Multiplexers Demultiplexers Combinational Design + Decoders/Encoders 9
Decoders Binary-to-Decimal decoder: n inputs, 2 n outputs (n x 2 n decoder). Some decoders have enable inputs. Each output represents a minterm of an n -variable function. The output that corresponds to the minterm that appears on the inputs is asserted (active low or high depending upon the device), all other outputs are inactive. s 1 s 0 D 3 D 2 D 1 D 0 EN 0 0 1 0 0 0 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 0 0 0 X X 0 0 0 0 0 Combinational Design + Decoders/Encoders 10
Decoder s 0 D 0 s 1 D 1 s 0 D 1 s n-1 D 2 -1 n D 2 D 3 Internal Structure Combinational Design + Decoders/Encoders 11
Build a 4x16 decoder using 2x4 decoders (decoder tree). . a b c d EN minterm 0 0 0 0 1 m0 0 0 0 1 1 m1 0 0 1 0 1 m2 0 0 1 1 1 m3 0 1 0 0 1 m4 0 1 0 1 1 m5 0 1 1 0 1 m6 0 1 1 1 1 m7 1 0 0 0 1 m8 1 0 0 1 1 m9 1 0 1 0 1 m10 1 0 1 1 1 m11 1 1 0 0 1 m12 1 1 0 1 1 m13 1 1 1 0 1 m14 1 1 1 1 1 m15 X X X X 0 0 Combinational Design + Decoders/Encoders 12
Implementing Logic using Decoders Decoders can be used to implement logic functions as follows: 1 Combinational Design + Decoders/Encoders 13
BCD-7 Segment Decoder A B C D a b c d e f g 0 0 0 0 1 1 1 1 1 1 0 a 0 0 0 1 0 1 1 0 0 0 0 0 0 1 0 1 1 0 1 1 0 1 f b 0 0 1 1 1 1 1 1 0 0 1 0 1 0 0 0 1 1 0 0 1 1 g e c 0 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 d 0 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 d d d d 0 0 0 0 0 0 0 Combinational Design + Decoders/Encoders 14
Encoders Encoder is opposite of decoder. Its output code has fewer bits than the input code. Binary Encoder : 1-out-of-2 n code (decimal input). Input: Output: n -bit binary code. Combinational Design + Decoders/Encoders 15
End of Week 3: Module 13 Thank You Combinational Design + Decoders/Encoders 16
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