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Dependences and Hazards Lecture 17 CS301 Administrative Daily - PowerPoint PPT Presentation

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Dependences and Hazards Lecture 17 CS301 Administrative Daily Review of todays lecture w Due tomorrow (10/30) at 8am HW #7 due today at 5pm HW #8 assigned w Due 10/5 at 5pm Read Chapter 4.8-4.9 Data Dependencies We

  1. Control Hazard In what cycle does the nextPC get calculated for the bne? End of 4 In what cycle does the or get fetched? Beginning of 3 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID MEM WB or $s3, $s0, $t3 IF IF IF ID MEM WB end: sw $s2, 0($t1) 1 2 3 4 5 6 7 8 Time->

  2. Barriers to Pipeline Performance • Uneven stages • Pipeline register delays • Data Hazards • Control Hazards w Whether an instruction will execute depends on the outcome of a conditional branch still in the pipeline

  3. Control Hazard In what cycle does the nextPC get calculated for the bne? End of 4 In what cycle does the or get fetched? Beginning of 3 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID MEM WB or $s3, $s0, $t3 IF IF IF ID MEM WB end: sw $s2, 0($t1) 1 2 3 4 5 6 7 8 Time->

  4. Solution 1: Add hardware to determine branch in decode stage In what cycle does the nextPC get calculated for the bne? End of 4 In what cycle does the or get fetched? Beginning of 3 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID MEM WB or $s3, $s0, $t3 IF IF IF ID MEM WB end: sw $s2, 0($t1) 1 2 3 4 5 6 7 8 Time->

  5. Pipelined Machine Decode Execute Memory Fetch << << 4 2 2 Addr Out Data src1 src1data op/fun PC Read Addr Out Data rs Data Memory src2 src2data Instruction rt Register File Memory rd destreg imm In Data destdata Sign 16 32 Ext (Writeback) Pipeline Register

  6. Solution 1: Add hardware to determine branch in decode stage In what cycle does the nextPC get calculated for the bne? 3 In what cycle does the or get fetched? 3 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  7. Note • For the rest of this course, the branches will be determined in the decode stage • All other optimizations will be in addition to moving branch calculation to decode stage

  8. Solution 2: 
 Branch Delay Slot Redefine the semantics of a branch: ALWAYS execute the instruction after the branch, regardless of the outcome of the branch. IF ID MEM WB add $s5, $s4, $t1 bne $s0, $s1, end IF ID MEM WB nop IF ID EX MEM WB IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  9. Solution 2: Also add 
 Branch Delay Slot ALWAYS execute the instruction after the branch, regardless of the outcome of the branch. Try to fill that spot with an instruction from before the branch. bne $s0, $s1, end IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  10. Branch Delay Slot • The hardware always executes instruction after a branch • The compiler tries to take an instruction from before branch and move it after branch • If it can find no instruction, it inserts a nop after the branch • If it forgets to place nop or inst there, you can get incorrect execution!!!!!

  11. Branch Delay Slot - Limitations • If you have a machine with 20 pipeline stages, and it takes 10 stages to calculate branch, how many branch delay slots are there? • Can you move any instruction into branch delay slot? • What happens as the pipeline gets deeper?

  12. Branch Delay Slot - Limitations • If you have a machine with 20 pipeline stages, and it takes 10 stages to calculate branch, how many branch delay slots are there? 9 • Can you move any instruction into branch delay slot? • What happens as the pipeline gets deeper?

  13. Branch Delay Slot - Limitations • If you have a machine with 20 pipeline stages, and it takes 10 stages to calculate branch, how many branch delay slots are there? 9 • Can you move any instruction into branch delay slot? Only independent instructions • What happens as the pipeline gets deeper?

  14. Branch Delay Slot - Limitations • If you have a machine with 20 pipeline stages, and it takes 10 stages to calculate branch, how many branch delay slots are there? 9 • Can you move any instruction into branch delay slot? Only independent instructions • What happens as the pipeline gets deeper? More difficult to fill slots • Branch delay slot is only used in short pipelines!

  15. Solution 3: Branch Prediction Guess which way the branch will go before calculation occurs. Clean up if predictor is wrong. IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  16. Solution 3: Branch Prediction First: Always predict not taken If we are right, how many cycles do we stall? IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  17. Solution 3: Branch Prediction First: Always predict not taken If we are right, how many cycles do we stall? 0 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  18. Solution 3: Branch Prediction First: Always predict not taken If we are wrong, then flush incorrect instruction(s) IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID EX MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  19. Solution 3: Branch Prediction First: Always predict not taken If we are wrong, then flush incorrect instruction(s) How many cycles do we stall? IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID EX MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  20. Solution 3: Branch Prediction First: Always predict not taken If we are wrong, then flush incorrect instruction(s) How many cycles do we stall? 1 IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID EX MEM WB or $s3, $s0, $t3 end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  21. Solution 3: Branch Prediction First: Always predict taken Why will this still result in a stall? IF ID MEM WB add $s5, $s4, $t1 IF ID MEM WB bne $s0, $s1, end IF ID EX MEM WB end: sw $s2, 0($t1) IF ID MEM WB 1 2 3 4 5 6 7 8 Time->

  22. Branch Prediction • If we’re going to predict taken, we need to know where to branch to earlier than when we determine where the branch actually goes to. w How?

  23. Branch Prediction • Understand the nature of programs • Are branch directions random? • If not, what will correlate? w Past behavior? w Previous branches’ behavior?

  24. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Is beq often taken or not taken? Is bne often taken or not taken?

  25. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Is beq often taken or not taken? Not Taken Is bne often taken or not taken?

  26. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Is beq often taken or not taken? Is beq often taken or not taken? Not Taken Is bne often taken or not taken? Is bne often taken or not taken? Taken Conclusion: We want a prediction that is unique to each branch. Look up prediction by PC

  27. First Branch Predictor Predict whatever happened last time Update the predictor for next time Predict Taken Predict Not Taken

  28. First Branch Predictor Predict whatever happened last time Update the predictor for next time T NT Predict Taken Predict Not Taken

  29. First Branch Predictor Predict whatever happened last time Update the predictor for next time T NT NT 1 0 T Predict Taken Predict Not Taken

  30. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 Prediction Reality NextState

  31. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 Prediction NT Reality T NextState 1

  32. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 Prediction NT T Reality T T NextState 1 1

  33. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 0 Prediction NT T T Reality T T NT NextState 1 1 0

  34. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 0 1 Prediction NT T T NT Reality T T NT T NextState 1 1 0 1

  35. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 0 1 1 Prediction NT T T NT T Reality T T NT T T NextState 1 1 0 1 1

  36. Branch Prediction When are we wrong????? for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 0 1 1 Prediction NT T T NT T T Reality T T NT T T NT NextState 1 1 0 1 1 0

  37. Branch Prediction When are we wrong????? First and last iteration of each loop for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 0 1 1 0 1 1 Prediction NT T T NT T T Reality T T NT T T NT NextState 1 1 0 1 1 0

  38. Two-bit Branch Predictor Must be wrong twice in a row to switch prediction Update the predictor for next time One wrong-> state 1 or 2, No wrong -> state 0 or 3 3 2 1 0 Predict Not Taken Predict Taken

  39. Two-bit Branch Predictor Must be wrong twice in a row to switch prediction Update the predictor for next time One wrong-> state 1 or 2, No wrong -> state 0 or 3 T NT 3 2 1 0 Predict Not Taken Predict Taken

  40. Two-bit Branch Predictor Must be wrong twice in a row to switch prediction Update the predictor for next time One wrong-> state 1 or 2, No wrong -> state 0 or 3 T NT NT 3 2 1 0 T Predict Not Taken Predict Taken

  41. Two-bit Branch Predictor Must be wrong twice in a row to switch prediction Update the predictor for next time One wrong-> state 1 or 2, No wrong -> state 0 or 3 T NT NT NT 3 2 1 0 T T Predict Not Taken Predict Taken

  42. Second Branch Predictor Must be wrong twice in a row to switch prediction Update the predictor for next time NT T NT NT NT 3 2 1 0 T T T Predict Not Taken Predict Taken

  43. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 Prediction Reality NextState

  44. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 Prediction T Reality T NextState 3

  45. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 Prediction T T Reality T T NextState 3 3

  46. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 2 Prediction T T T Reality T T NT NextState 3 3 2

  47. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 2 3 Prediction T T T T Reality T T NT T NextState 3 3 2 3

  48. Branch Prediction for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 2 3 3 Prediction T T T T T Reality T T NT T T NextState 3 3 2 3 3

  49. Branch Prediction When are we wrong????? for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 2 3 3 Prediction T T T T T T Reality T T NT T T NT NextState 3 3 2 3 3 2

  50. Branch Prediction When are we wrong????? Only when we exit the loop for(i; i<n;i++) slt $t1, $s2, $s3 do some work beq $t1, $0, end loop: do some work addi $s2, $s2, 1 slt $t1, $s2, $s3 bne $t1, $0, loop end: Iteration 1 2 … x 1 2 … y CurState 2 3 3 2 3 3 Prediction T T T T T T Reality T T NT T T NT NextState 3 3 2 3 3 2

  51. Simplest Branch Predictors • Memory indexed by lower portion of 01 address 11 PC 100........ 10110 00 • Entry contains few 00 . bits specifying . . prediction 10 01 • Accessed in IF stage 11 00 so fetching of target occurs in next cycle

  52. Real Branch Predictors • TargetPC saved with predictor • Limited space, so different branches may map to the same predictor w errors? • Prediction based on past behavior of several branches

  53. Advantages of 
 Branch Prediction • No extra instructions • Highly predictable branches have no stalls • Works well with loops. • All hardware - no compiler necessary

  54. Disadvantages/Limits of 
 Branch Prediction • Large penalty when wrong w Badly behaved branches kill performance • Only a few can be performed each cycle (only a problem in multi-issue machines)

  55. Minimizing Control Hazards

  56. Minimizing Control Hazards • Calculate branch in decode stage

  57. Minimizing Control Hazards • Calculate branch in decode stage • Branch delay slot

  58. Minimizing Control Hazards • Calculate branch in decode stage • Branch delay slot • Branch prediction

  59. CPI • CPI = ∑ ((% instr) × (cycles)) • How do hazards affect CPI? • How do branches affect CPI?

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