Using Predicate Path Information in Hardware to Determine True - PowerPoint PPT Presentation

Using Predicate Path Information in Hardware to Determine True Dependences Lori Carter and Brad Calder University of California, San Diego June 26, 2002

Target – EPIC Architecture LJCARTER UCSD •E xplicitly P arallel I nstruction C omputing •Supports Predicated Execution •VLIW in nature •Able to communicate some analysis to the hardware •Intel Itanium IA64 Architecture is EPIC

Predicated Execution (If-conversion) LJCARTER UCSD b=rand() b=rand() a=c a=c cmp P2,P3 b>a b>a (P2) d=q (P2) c=a-d d=q d=r (P3) d=r c=a-d c=a+d (P3) c=a+d f=c f=c � Both paths execute � Only path guarded by true commits

If-Conversion Complicates Dependency Analysis LJCARTER UCSD cycle cycle b>c b>c P1, P2 b>c P1, P2 b>c 1 (P1) b=3 2 (P1) b=3 2 b=3 b=3 c=a+b c=a+b (P2) c=a+b 3 (P2) c=a+b 3 data dependence?

If-Conversion Complicates Dependency Analysis LJCARTER UCSD cycle cycle b>c b>c P1, P2 b>c P1, P2 b>c 1 (P1) b=3 2 (P1) b=3 2 b=3 b=3 c=a+b c=a+b (P2) c=a+b 2 (P2) c=a+b 2 data dependence? No data dependence, P1 and P2 are disjoint

Research Goal LJCARTER UCSD Predicate-Sensitive Analysis is Critical! Our Goal: Provide Dynamic Predicate-Sensitive Analysis for the In-Order EPIC Architecture

Related Work LJCARTER UCSD Compiler based predicate-sensitive analysis mechanisms Predicate Query System (PQS) Analysis Techniques for Predicated Code Johnson and Schlansker, Micro ’96 Full Path Predicates Predicated Static Single Assignment Carter et. al., PACT ’99 Predicate Analysis System (PAS) Accurate and Efficient Predicate Analysis with Binary Decision Diagrams Sias et. al., Micro 2000

Related Work LJCARTER UCSD Hardware Solutions for Multiple Path Definitions Select- µ op Register Renaming for Dynamic add r5=r2,r4 Execution of Predicated Code cmp P2,P3 =r5,0 Wang et. al., HPCA 2001 (P2) mov r5’=r7 (P3) add r6=r5 or r5’,3 Our Work in Disjoint Path Analysis recognizes the need for dynamic predicate analysis within the EPIC structure

Outline LJCARTER UCSD •Introduction to predication and predicate- sensitive analysis •Related Work •Motivate need for dynamic predicate-sensitive dependency analysis for EPIC architectures •Use and implementation of Disjoint Path Analysis •Methodology and Results •Conclusions and Future Work

Motivation for Disjoint Path Analysis LJCARTER UCSD •Itanium has a scoreboard •Predicate Register values help determine when dependences are broken (P4) ld r7 = [r5] (P5) mov r8 = r7 • Disjoint Path Analysis •Don’t set unnecessary dependences

Possible Schedules LJCARTER UCSD cycle cycle 1. cmp P4, P5 = r8,r5 0 1. cmp P4, P5 = r8,r5 0 2. (P4) ld r7 = [r5] 1 2. (P4) ld r7 = [r5] 1 3. (P5) mov r8 = r7 2 3. (P5) mov r8 = r7 1 Base Itanium, no Base Itanium, with disjointness disjointness information information

Two Predicates Defined in Unconditional CMP are Disjoint LJCARTER UCSD 1. c=d-2 c=d-2 b>c 2. cmp P1,P2 b>c P1 P2 3. (P1) b=3 b=3 c=a+b 4. (P1) cmp P3, P4 b>a b>a 5. (P2) c=a+b P3 P4 a=b+3 a=c+4 6. (P3) a=b+3 7. (P4) a=c+4 Questions: Is b in statement 3 a definition of b in statement 5?

Predicate Definition Inherits Disjointness Properties from Guarding Predicate LJCARTER UCSD 1. c=d-2 c=d-2 b>c 2. cmp P1,P2 b>c P1 P2 3. (P1) b=3 b=3 c=a+b 4. (P1) cmp P3, P4 b>a b>a 5. (P2) c=a+b P3 P4 a=b+3 a=c+4 6. (P3) a=b+3 7. (P4) a=c+4 Questions: Is b in statement 3 a definition of b in statement 5? Is c in statement 5 a definition of c in statement 7?

Outline LJCARTER UCSD •Introduction to predication and predicate- sensitive analysis •Related Work •Motivate need for dynamic predicate-sensitive dependency analysis for EPIC architectures •Use and implementation of Disjoint Path Analysis •Methodology and Results •Conclusions and Future Work

Basic Structures Required to Create Predicate- Sensitive Analysis in Hardware LJCARTER UCSD •Structure to keep track of multiple add r5=r2,r4 possible definitions that reach a use cmp P2,P3 =r5,0 and which predicate guards each (P2) mov r5=r7 Register Alias Table [Wang, HPCA 2001] (P3) add r6=r5,3 (P3) cmp P4,P5 = r6,0 (P4) mov r5=3 (P4) mov r6=-1 (P5) mov r6=0 mult r9=r5,r6 cmp P5,P6=r4,r5

Basic Structures Required to Create Predicate- Sensitive Analysis in Hardware LJCARTER UCSD •Structure to keep track of multiple add r5=r2,r4 possible definitions that reach a use cmp P2 , P3 =r5,0 and which predicate guards each ( P2 ) mov r5=r7 Register Alias Table ( P3 ) add r6=r5,3 ( P3 ) cmp P4,P5 = r6,0 •Structure to maintain disjointness information ( P4 ) mov r5=3 ( P4 ) mov r6=-1 Path Information Table ( P5 ) mov r6=0 mult r9=r5,r6 cmp P5,P6=r4,r5

Basic Structures Required to Create Predicate- Sensitive Analysis in Hardware LJCARTER UCSD •Structure to keep track of multiple add r5=r2,r4 possible definitions that reach a use cmp P2 , P3 =r5,0 and which predicate guards each ( P2 ) mov r5=r7 Register Alias Table (RAT) ( P3 ) add r6=r5,3 ( P3 ) cmp P4,P5 = r6,0 •Structure to maintain disjointness information ( P4 ) mov r5=3 ( P4 ) mov r6=-1 Path Information Table (PIT) ( P5 ) mov r6=0 •Structure to recall what the current mult r9=r5,r6 definition of a predicate is cmp P5 ,P6=r4,r5 Last Definition Table (LDT) ( P6 ) mov r8=r6

Finding Dependences Using the RAT, PIT and LDT LJCARTER UCSD slot 0 slot 1 slot 2 slot 3 P2 P3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 1 1 Pit entry 0 P2 2 … P3 1 1 1 Pit entry 1 3 5 2 [1] -- [3] 0 4 6 3 5 logical register 7 4 6 5 8 7 6 9 . . . . . . . N n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4 2 cmp P2,P3 =r5,0 3 (P2) mov r5=r7 4 (P3) add r6=r5,3

Finding Dependences Using the RAT, PIT and LDT LJCARTER UCSD slot 0 slot 1 slot 2 slot 3 P2 P3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 1 1 Pit entry 0 P2 2 … P3 1 1 1 Pit entry 1 3 5 2 [1] -- [3] 0 4 6 3 5 logical register 7 4 6 5 8 7 6 9 . . . . . . . N n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4 2 cmp P2,P3 =r5,0 3 (P2) mov r5=r7 4 (P3) add r6=r5,3

Finding Dependences Using the RAT, PIT and LDT LJCARTER UCSD slot 0 slot 1 slot 2 slot 3 P2 P3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 1 1 Pit entry 0 P2 2 … P3 1 1 1 Pit entry 1 3 5 2 [1] -- [3] 0 4 6 3 5 logical register 7 4 6 5 8 7 6 9 . . . . . . . N n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4 2 cmp P2,P3 =r5,0 3 (P2) mov r5=r7 4 (P3) add r6=r5,3

Inserting Register Definitions into the RAT LJCARTER UCSD slot 0 slot 1 slot 2 slot 3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 2 … 1 3 5 2 [1] -- 4 6 3 5 logical register 7 4 6 5 8 7 6 9 . . . . . . . N n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4

Adding Predicate Disjointness Information LJCARTER UCSD slot 0 slot 1 slot 2 slot 3 P2 P3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 1 1 Pit entry 0 2 P2 … 1 1 1 Pit entry 1 P3 3 5 2 [1] -- 4 6 3 5 logical register 7 4 6 5 8 7 6 9 . . . . . . . N n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4 2 cmp P2,P3 =r5,0

Inheriting Predicate Disjointness Information LJCARTER UCSD Vector copied P2 P3 P4 P5 slot 0 slot 1 slot 2 slot 3 Predicate def inst PIT def inst PIT def inst PIT def inst PIT Register v 0 1 2 3 4 5 6 …… N 1 0 0 1 1 1 P2 1 Pit entry 0 2 P3 1 … 1 1 Pit entry 1 3 2 1 P4 5 [1] -- [3] 0 Complement 4 1 Pit entry 2 P5 3 1 bits set 6 [4] 1 5 logical register 1 Pit entry 3 4 7 6 5 8 7 6 9 . . . . . . N . n 63 Register Alias Table Path Information Table Last Definition Table 1 add r5=r2,r4 2 cmp P2,P3 =r5,0 3 (P2) mov r5 = r7 4 (P3) add r6 = r5,3 5 (P3) cmp P4,P5 = r6,0