datapath components
play

Datapath Components Prof. Usagi Recap: Digital circuits only have - PowerPoint PPT Presentation

Feb 18, 2023 •183 likes •666 views

Datapath Components Prof. Usagi Recap: Digital circuits only have 0s and 1s 1 0 2 Recap: Converting from decimal to binary 2 321 2 160 1 2 80 0 2 40 0 2 20 0 2 10 0 2 5 0 2 2

  1. Datapath Components Prof. Usagi

  2. Recap: Digital circuits only have 0s and 1s… 1 0 2

  3. Recap: Converting from decimal to binary 2 321 2 160 …… 1 2 80 …… 0 2 40 …… 0 2 20 …… 0 2 10 …… 0 2 5 …… 0 2 2 …… 1 1 …… 0 321 = 0b 101000001 3

  4. Recap: 2-variable K-map example A’ A A 0 1 Input Output B A B 0 0 1 B’ B’ 0 1 1 0 1 1 1 0 1 1 1 0 B 1 1 0 A’ F(A, B) = A’ + B’ 4

  5. Recap: 3-variable K-map • Reduce to 2-variable K-map — 1 dimension will represent two variables • Adjacent points should differ by only 1 bit • So we only change one variable in the neighboring column • 00, 01, 11, 10 — such numbering scheme is so-called Gray–code A’B’ A’B AB AB’ Input (A, B) Output 0,0 0,1 1,1 1,0 A B C C C’ 0 0 0 1 0 1 1 1 1 0 0 1 1 C’ 0 1 0 1 0 1 1 1 1 1 1 0 0 C 1 0 0 1 A’ 1 0 1 0 1 1 0 1 F(A, B, C) = A’ + C’ 1 1 1 0 5

  6. Recap: 4-variable K-map • Reduce to 2-variable K-map — both dimensions will represent two variables • Adjacent points should differ by only 1 bit • So we only change one variable in the neighboring column • Use Gray-coding — 00, 01, 11, 10 A’B’ A’B AB AB’ 00 01 11 10 A’B’C’ C’D’ 00 1 0 0 0 F(A, B, C) = A’B’C’+B’CD’ C’D 01 1 0 0 0 CD 11 0 0 0 0 CD’ 10 1 0 0 1 B’CD’ 6

  7. Recap: K-Map with “Don’t Care”s You can treat “X” as either 0 or 1 — depending on which is more advantageous A’B’ A’B AB AB’ (A, B) 0,0 0,1 1,1 1,0 C 0 1 C’ C’ 0 1 X 1 1 AC’ C 1 1 1 0 0 A’C A’B’ A’C If we treat the “X” as 0? If we treat the “X” as 1? F(A,B,C)=A’B’+A’C+AC’ F(A,B,C) = C’ + A’C 7

  8. BCD+1 — Binary coded decimal + 1 Input Output • 0x0 — 1 I8 I4 I2 I1 O8 O4 O2 O1 0 0 0 0 0 0 0 1 • 0x1 — 2 0 0 0 1 0 0 1 0 • 0x2 — 3 I8 O8 0 0 1 0 0 0 1 1 Comparator • 0x3 — 4 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 I4 O4 • 0x4 — 5 0 1 0 1 0 1 1 0 Input Output • 0x5 — 6 0 1 1 0 0 1 1 1 I2 O2 0 1 1 1 1 0 0 0 • 0x6 — 7 1 0 0 0 1 0 0 1 I1 O1 • 0x7 — 8 1 0 0 1 0 0 0 0 • 0x8 — 9 1 0 1 0 X X X X 1 0 1 1 X X X X • 0x9 — 0 1 1 0 0 X X X X • 0xA — 0xF — Don’t care 1 1 0 1 X X X X 1 1 1 0 X X X X 8 1 1 1 1 X X X X

  9. K-maps Input Output O8 O4 I8’I4’ I8’I4 I8I4 I8I4’ I8’I4’ I8’I4 I8I4 I8I4’ I8 I4 I2 I1 O8 O4 O2 O1 00 01 11 10 00 01 11 10 0 0 0 0 0 0 0 1 00 0 0 X 1 00 0 1 X 0 I2’I1’ I2’I1’ 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 01 0 0 X 0 01 0 1 X 0 I2’I1 I2’I1 0 0 1 1 0 1 0 0 I2I1 11 0 1 X X I2I1 11 1 0 X X 0 1 0 0 0 1 0 1 10 0 0 X X 10 0 1 X X I2I1’ I2I1’ 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 1 O2 O1 I8’I4’ I8’I4 I8I4 I8I4’ I8’I4’ I8’I4 I8I4 I8I4’ 0 1 1 1 1 0 0 0 1 0 0 0 1 0 0 1 00 01 11 10 00 01 11 10 1 0 0 1 0 0 0 0 I2’I1’ 00 0 0 X 0 I2’I1’ 00 1 1 X 1 1 0 1 0 X X X X 01 1 1 X 0 01 0 0 X 0 I2’I1 I2’I1 1 0 1 1 X X X X 1 1 0 0 X X X X 11 0 0 X X 11 0 0 X X I2I1 I2I1 1 1 0 1 X X X X 10 1 1 X X 10 1 1 X X I2I1’ I2I1’ 1 1 1 0 X X X X 9 1 1 1 1 X X X X

  10. Outline • Revisiting the binary number system • Adders • Multiplexer 10

  11. What do we want from a number system? • Obvious representation of 0, 1, 2, ...... • Represent positive/negative/integer/floating points • Efficient usage of number space • Equal coverage of positive and negative numbers • Easy hardware design • Minimize the hardware cost/reuse the same hardware as much as possible • Easy to distinguish positive numbers • Easy to negation 11

  12. Representing a positive number • Assume that we have 4 bits Decimal Binary Decimal Binary 0 0000 4 0100 1 0001 5 0101 2 0010 6 0110 3 0011 7 0111 • Example binary arithmetic 3 + 2 = 5 3 + 3 = 6 1 carry 1 1 0 0 1 1 0 0 1 1 + 0 0 1 0 + 0 0 1 1 0 0 1 0 1 1 1 0 12

  13. Poll close in The first proposal Decimal Binary Decimal Binary • How many of the following goals can “ simply 0 0000 -0 1000 using the most significant bit as the 1 0001 -1 1001 2 0010 -2 1010 signed bit ” to represent a negative number 3 0011 -3 1011 fulfill in the number system? 4 0100 -4 1100 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1101 ② Efficient usage of number space 6 0110 -6 1110 7 0111 -7 1111 ③ Equal coverage of positive and negative numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 13

  14. The first proposal Decimal Binary Decimal Binary • How many of the following goals can “ simply 0 0000 -0 1000 using the most significant bit as the 1 0001 -1 1001 2 0010 -2 1010 signed bit ” to represent a negative number 3 0011 -3 1011 fulfill in the number system? 4 0100 -4 1100 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1101 ② Efficient usage of number space 6 0110 -6 1110 7 0111 -7 1111 ③ Equal coverage of positive and negative numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 14

  15. Can this work? • 3 + 2 = 5 1 0 0 1 1 + 0 0 1 0 0 1 0 1 1 • 3 + (-2) = 1 0 0 1 1 + 1 0 1 0 1 = -5 (Not 1) 1 0 1 Doesn’t work well and you need a separate procedure to deal with negative numbers! 15

  16. The first proposal Decimal Binary Decimal Binary • How many of the following goals can “simply 0 0000 -0 1000 using the most significant bit as the signed 1 0001 -1 1001 2 0010 -2 1010 bit” to represent a negative number fulfill in 3 0011 -3 1011 the number system? 4 0100 -4 1100 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1101 ② Efficient usage of number space 6 0110 -6 1110 7 0111 -7 1111 ③ Equal coverage of positive and negative numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 16

  17. Poll close in The second proposal — 1’s complement Decimal Binary Decimal Binary • How many of the following goals can “1’s 0 0000 -0 1111 complement — flip/not every bit in the 1 0001 -1 1110 corresponding positive number ” to represent 2 0010 -2 1101 3 0011 -3 1100 a negative number fulfill in the number system? 4 0100 -4 1011 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1010 ② Efficient usage of number space 6 0110 -6 1001 ③ Equal coverage of positive and negative 7 0111 -7 1000 numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 17

  18. The second proposal — 1’s complement Decimal Binary Decimal Binary • How many of the following goals can “1’s 0 0000 -0 1111 complement — flip/not every bit in the 1 0001 -1 1110 corresponding positive number ” to represent 2 0010 -2 1101 3 0011 -3 1100 a negative number fulfill in the number system? 4 0100 -4 1011 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1010 ② Efficient usage of number space 6 0110 -6 1001 ③ Equal coverage of positive and negative 7 0111 -7 1000 numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 18

  19. Second proposal: 1’s complement • 3 + 2 = 5 1 0 0 1 1 + 0 0 1 0 0 1 0 1 • 3 + (-2) = 1 1 1 1 1 0 0 1 1 overflow + 1 1 0 1 = 0 (Still not 1) 0 0 0 0 Still does not work, but seems closer... 19

  20. The second proposal — 1’s complement Decimal Binary Decimal Binary • How many of the following goals can “1’s 0 0000 -0 1111 complement — flip/not every bit in the 1 0001 -1 1110 corresponding positive number ” to represent 2 0010 -2 1101 3 0011 -3 1100 a negative number fulfill in the number system? 4 0100 -4 1011 ① Obvious representation of 0, 1, 2, ...... 5 0101 -5 1010 ② Efficient usage of number space 6 0110 -6 1001 ③ Equal coverage of positive and negative 7 0111 -7 1000 numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 20

  21. Poll close in The third proposal — 2’s complement Decimal Binary Decimal Binary • How many of the following goals can “2’s 0 0000 -1 1111 complement — take the 1’s complement of 1 0001 -2 1110 corresponding positive number and then 2 0010 -3 1101 3 0011 -4 1100 +1 ” to represent a negative number fulfill in the 4 0100 -5 1011 number system? 5 0101 -6 1010 ① Obvious representation of 0, 1, 2, ...... 6 0110 -7 1001 ② Efficient usage of number space 7 0111 -8 1000 ③ Equal coverage of positive and negative numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 21

  22. The third proposal — 2’s complement Decimal Binary Decimal Binary • How many of the following goals can “2’s 0 0000 -1 1111 complement — take the 1’s complement of 1 0001 -2 1110 corresponding positive number and then 2 0010 -3 1101 3 0011 -4 1100 +1 ” to represent a negative number fulfill in the 4 0100 -5 1011 number system? 5 0101 -6 1010 ① Obvious representation of 0, 1, 2, ...... 6 0110 -7 1001 ② Efficient usage of number space 7 0111 -8 1000 Does not waste 1111 anymore ③ Equal coverage of positive and negative numbers ④ Easy hardware design A. 0 B. 1 C. 2 D. 3 E. 4 22

Recommend

UMBC A B M A L T F O U M B C I M Y O R T 1 (December 11, 2000 3:44 pm) I E S

UMBC A B M A L T F O U M B C I M Y O R T 1 (December 11, 2000 3:44 pm) I E S

Principles of VLSI Design Subsystem Design CMPE 413/CMSC 711 Digital Device Components A simple processor illustrates many of the basic components used in any dig- ital system: Memory Input-Output Control Datapath Datapath: The core --

468 views • 36 slides
CSCI-2500: Computer Organization Processor Design Datapath n The datapath is the interconnection

CSCI-2500: Computer Organization Processor Design Datapath n The datapath is the interconnection

CSCI-2500: Computer Organization Processor Design Datapath n The datapath is the interconnection of the components that make up the processor. n The datapath must provide connections for moving bits between memory, registers and the ALU.

2.24k views • 186 slides
LECTURE 5 Single-Cycle Datapath and Control PROCESSORS Datapath and control are the two

LECTURE 5 Single-Cycle Datapath and Control PROCESSORS Datapath and control are the two

LECTURE 5 Single-Cycle Datapath and Control PROCESSORS Datapath and control are the two components that come together to be collectively known as the processor. Datapath consists of the functional units of the processor. Elements

877 views • 54 slides
Datapath Components (2) Prof. Usagi Recap: 2s complement Guidelines Obvious

Datapath Components (2) Prof. Usagi Recap: 2s complement Guidelines Obvious

Datapath Components (2) Prof. Usagi Recap: 2s complement Guidelines Obvious representation of 0, 1, 2, ...... Efficient usage of number space Equal coverage of positive and negative numbers Easy hardware design 1s

618 views • 34 slides
UMBC A B M A L T F O U M B C I M Y O R T 1 (11/6/07) I E S R C E O V U

UMBC A B M A L T F O U M B C I M Y O R T 1 (11/6/07) I E S R C E O V U

Programmable Logic Devices Verilog Design Examples CMPE 415 Building Blocks Digital systems consist of 2 main parts: the datapath and control circuits. Datapath : stores and manipulates data and includes components such as registers, shift

348 views • 17 slides
Single-Cycle CPU Datapath Design "The Do-It-Yourself CPU Kit" CSE 141, S2'06 Jeff

Single-Cycle CPU Datapath Design "The Do-It-Yourself CPU Kit" CSE 141, S2'06 Jeff

Single-Cycle CPU Datapath Design "The Do-It-Yourself CPU Kit" CSE 141, S2'06 Jeff Brown The Big Picture: Where are We Now? The Five Classic Components of a Computer Processor Input Control Memory Datapath Output

836 views • 26 slides
Spiral 2-1 Datapath Components: Counters Adders Design Example: Crosswalk Controller 2-1.2

Spiral 2-1 Datapath Components: Counters Adders Design Example: Crosswalk Controller 2-1.2

2-1.1 Spiral 2-1 Datapath Components: Counters Adders Design Example: Crosswalk Controller 2-1.2 Spiral Content Mapping Combinational Sequential System Level Implementation Spiral Theory Project Design Design Design and Tools

852 views • 61 slides
Datapath Components (3) Those Who Remember Things Prof. Usagi Recap: Combinational

Datapath Components (3) Those Who Remember Things Prof. Usagi Recap: Combinational

Datapath Components (3) Those Who Remember Things Prof. Usagi Recap: Combinational v.s. sequential logic Combinational logic The output is a pure function of its current inputs The output doesnt change regardless how many

564 views • 43 slides
FSMD%Block%Diagram FSM$Datapath*Systems Datapath%Elements

FSMD%Block%Diagram FSM$Datapath*Systems Datapath%Elements

FSMD%Block%Diagram FSM$Datapath*Systems Datapath%Elements FSMD%Example%Requires%RAM,%Comparator,%Counter Altera%LPM%library%has%many%elements%useful%for% building%common%datapath%functions LPM_RAM_DQ%%

649 views • 19 slides
This Unit: Single-Cycle Datapath App App App Datapath storage elements System software

This Unit: Single-Cycle Datapath App App App Datapath storage elements System software

This Unit: Single-Cycle Datapath App App App Datapath storage elements System software MIPS Datapath CIS 371 MIPS Control Mem CPU I/O Computer Organization and Design Unit 4: Single-Cycle Datapath Based on slides by Prof. Amir

287 views • 14 slides
Lesson 10 Processors Continued Building a datapath Datapath element is a unit used to operate

Lesson 10 Processors Continued Building a datapath Datapath element is a unit used to operate

Lesson 10 Processors Continued Building a datapath Datapath element is a unit used to operate on or hold data within a processor. In the MIPS implementation, the datapath elements include the instruction and data memories, the register

1.07k views • 30 slides
CSCI341 Lecture 30, Building a Datapath RECALL... The datapath is a representation of

CSCI341 Lecture 30, Building a Datapath RECALL... The datapath is a representation of

CSCI341 Lecture 30, Building a Datapath RECALL... The datapath is a representation of the flow of information (data, instructions) through the CPU Implemented as combination of circuitry and combinatorial & sequential chips

404 views • 17 slides
Datapath Design, Coding Standards, and Lab 2 1 Separating Control From Data The datapath is

Datapath Design, Coding Standards, and Lab 2 1 Separating Control From Data The datapath is

Datapath Design, Coding Standards, and Lab 2 1 Separating Control From Data The datapath is where data moves from place to place. Computation happens in the datapath No decisions are made here. Things you should find in a

276 views • 14 slides
Pipelining Full Datapath Chapter 4 The Processor 2 Datapath With Control Chapter 4

Pipelining Full Datapath Chapter 4 The Processor 2 Datapath With Control Chapter 4

Pipelining Full Datapath Chapter 4 The Processor 2 Datapath With Control Chapter 4 The Processor 3 Performance Issues Longest delay determines clock period Critical path : load instruction Instruction memory

1.04k views • 86 slides
Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data

Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data

Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data moves from place to place. Computation happens in the datapath No decisions are made here. Things you should find in a datapath Muxes

181 views • 17 slides
Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data

Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data

Control Path Design and Lab 3 1 Separating Control From Data The datapath is where data moves from place to place. Computation happens in the datapath No decisions are made here. Things you should find in a datapath Muxes

321 views • 16 slides
Spiral 3-3 Single Cycle CPU 3-3.2 Learning Outcomes I understand how the single-cycle CPU

Spiral 3-3 Single Cycle CPU 3-3.2 Learning Outcomes I understand how the single-cycle CPU

3-3.1 Spiral 3-3 Single Cycle CPU 3-3.2 Learning Outcomes I understand how the single-cycle CPU datapath supports each type of instruction I understand why each mux is needed to select appropriate inputs to the datapath components

546 views • 38 slides
Where are We Now? The Five Classic Components of Computer System Architecture a Computer

Where are We Now? The Five Classic Components of Computer System Architecture a Computer

Where are We Now? The Five Classic Components of Computer System Architecture a Computer Processor Part II Processor Input Control Memory Chalermek Intanagonwiwat Datapath Output Todays Topic: Designing the Slides courtesy of

268 views • 9 slides
Datapath Elements & Single Cycle Datapath Unit Chapter 11 Datapath Elements Introduction

Datapath Elements & Single Cycle Datapath Unit Chapter 11 Datapath Elements Introduction

Datapath Elements & Single Cycle Datapath Unit Chapter 11 Datapath Elements Introduction Register Files Register Layout Register Files Write Decoder Register Files Write Decoder Register Files 32-Bit words, 32 Registers

387 views • 37 slides
HW/SW Codesign w/ FPGAs Microprogramming II ECE 495/595 The Microprog. Datapath (A Practical

HW/SW Codesign w/ FPGAs Microprogramming II ECE 495/595 The Microprog. Datapath (A Practical

HW/SW Codesign w/ FPGAs Microprogramming II ECE 495/595 The Microprog. Datapath (A Practical Intro. to HW/SW Codesign, P. Schaumont) A datapath attached to the microprogrammed controller consists of three parts: Computation units such as

826 views • 31 slides
CSSE232 Computer Architecture I Mul5cycle Datapath Class Status

CSSE232 Computer Architecture I Mul5cycle Datapath Class Status

CSSE232 Computer Architecture I Mul5cycle Datapath Class Status Next 3 days : Mul5cycle datapath Reading Mul5cycle datapath is not in the book!

709 views • 34 slides
CENG 3420 Lecture 06: Datapath Bei Yu byu@cse.cuhk.edu.hk CENG3420 L06.1 Spring 2018 The

CENG 3420 Lecture 06: Datapath Bei Yu byu@cse.cuhk.edu.hk CENG3420 L06.1 Spring 2018 The

CENG 3420 Lecture 06: Datapath Bei Yu byu@cse.cuhk.edu.hk CENG3420 L06.1 Spring 2018 The Processor: Datapath & Control q We're ready to look at an implementation of the MIPS q Simplified to contain only: memory-reference

705 views • 39 slides
Design of Datapath elements in Digital Circuits Debdeep Mukhopadhyay IIT Madras What is

Design of Datapath elements in Digital Circuits Debdeep Mukhopadhyay IIT Madras What is

Design of Datapath elements in Digital Circuits Debdeep Mukhopadhyay IIT Madras What is datapath? Suppose we want to design a Full Adder (FA): Sum=A ^ B ^ CIN = Parity(A,B,CIN) COUT=AB+ACIN+BCIN=MAJ(A,B,CIN) Combine the two

852 views • 58 slides
1 5.1 Introduction A Typical Memory Hierarchy A Typical Memory Hierarchy Memory Technology

1 5.1 Introduction A Typical Memory Hierarchy A Typical Memory Hierarchy Memory Technology

Review: Major Components of a Computer Review: Major Components of a Computer Processor Devices Memory Memory Control Hierarchy Hierarchy Input Memory Datapath Output Original slides from: Computer Architecture A Quantitative

447 views • 10 slides

More recommend