Data AcQuisition for the CALICE engineering prototype of the Analog Hadronic Calorimeter for the International Linear Collider. DPG Spring Meeting 2016 A. Irles DPG Spring Meeting 2016 Hamburg 29.02.2016
Outline of the talk > The AHCAL engineering prototype. > DAQ hardware, chain of devices. > Readout & data organization > Event Building > Common DAQ & running with EUDAQ as high level DAQ software > Plans and prospects Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 2
The AHCAL engineering prototype > Scalable prototype to real International Linear Detector, one of the two detectors planned for the ILC → see talk by ... > High granularity calorimeter to optimize the energy reconstruction through the Particle Flow approach → see talk by ... . Challenging data management. Autotriger mode (see next slides) > Not traditional cooling approach: Particle Flow requires minimum non-active material. Power Pulsing approach → take profit of the specific bunch train structure of the ILC to reduce active time of the electronics → see talk by ... Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 3
The AHCAL engineering prototype > Scintillator tiles (3x3x0.3 cm 3 ) +SiPMs > SPIROC ASIC (designed by Omega group) 36 channels Autotrigger (signal must pass a threshold) 16 analogue memory cells Optional Trigger validation (unvalidated events are discarded): only in beam test mode Runs until 16 memory cells are full, then it needs long time to convert and readout (~10 ms) > Base unit: HBU 4 ASICs, 144 channels, 36x36 cm2 Scalability: 6 HBU in row (called “slab”) Up to 3 slabs read out by single HDMI cable DAQ Interface boards: DIF, Calib, Power Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 4
DAQ hardware: chain of devices Data > Clock and Control Card ( CCC ) Provides master clock Trigger Starts and stops the acquisition according to the Spill CCC spill level and readiness of all ASICs Distributes trigger validation … > Link Data Aggregator ( LDA ) Up to 8 Packet collecting LDA PC LDAs Packet processing (decoding, merging) Send the packets over TCP/IP to DAQ PC ... ... ... > Detector InterFace ( DIF ) Up to 96 Up to 96 Up to 96 Controls the ASICs (voltages, acq. state) DIF DIFs DIFs DIFs Collects data from all ASICs on HBU Sends the data to LDA … > ASIC ( SPIROC , Omega group) Up to 72 Reads out 36 SiPMs ASIC SPIROCs Has 16 memory channels for ADC and TDC 36 SiPMs Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 5
DAQ hardware: chain of devices Modules (ASIC+SiPMs) and DAQ interfaces (DIF, Calibration and Power Boards) CCC Wing LDA Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 6
Readout > SPIROC operates either: ILC mode (200 ns clock period, 337 ns) Testbeam mode (4 µ s clock period) > SPIROC internally counts clock cycles with 12 bit counter (Bunch crossing ID, BxID) > For low beam rates, it might happen to have overrunning counter. Reset of the counter in 16 ms (TB mode) or 0.8 ms (ILC mode) For lower rates than 60 Hz (TB mode) or 1.2 kHz (ILCmode) we would need to: a) force readout after 16/0.8 ms reducing the data taking eff. b) deal with BxID numbers not uniquely defined > Next chip generation will provide a 16 bit counter > Synchronous in all layers, reset during start Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 7
Readout > Whenever 1 channel triggers (autotrigger) , all 36 channels are stored in the analogue memory cells (at the end of the BxID latest) Often noise; Sometimes a miss of an event (if one occurs at the beginning of the BxID and other at the end in the same channel) > Acquisition continuous until all memory cells are filled. Then BUSY signal is set → the detector goes blind up to ~50 ms due to conversion and slow readout Unpredictable time between readout cycles → make challenging the synchronization with other detectors > We count readout cycles, not “events” → next slide Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 8
Data organization > TPC stream. One readout = all packets with same ROC. > Packets (up to 2.4 kB) LDA header (length, readout cycle number, LDA id, port number, flags) Readout RAW ASIC data (up to 16 BxIDs, 16x TDC+ADC x 36 Channels) cycle: > Packets come out-of-order (data occupancy) L1 A1 L1 A2 > ASICs are readout in a given BxID if it has a hit in one of its own L2 A1 channels L1 A3 L3 A1 Layer 1, ASIC 2 Layer 2, ASIC 1 Layer 1, ASIC 1 L3 A2 ADC+TDC: ADC+TDC: ADC+TDC: L2 A2 16*36*2*2 16*36*2*2 16*36*2*2 L3 A3 Bytes Bytes Bytes Mcell: BxID: Mcell: BxID: Mcell: BxID: L1 A4 0 2 0 2 0 2 L2 A3 1 6 1 5 1 3 L2 A4 noise 2 7 2 9 2 6 L3 A4 3 9 3 ... 3 8 ROC+1 L3 A1 4 ... 5 9 (missing BxID 6) 4 ... Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 9
The AHCAL: auto trigger mode & event building > Autotrigger mode. > Event building is done afterwards (can be done near-online) in two steps: 1) We sort events by BXID in each readout cycle. 2) We get rid out of backgrounds by requiring the events to occur at the same time frame than real T0 channels hits... how? > Currently, we use an external trigger to timestamp events offline (coincidence of two scintillators): We fed the scintillators coincidence into a specific channels called T0. > Need to introduce external trigger signals (i.e. coincidence of scintillator signals) in our DAQ: use a Beam InterFace (BIF) Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 10
EUDAQ: towards ILC common test beams > EUDAQ is a DAQ framework modular and portable: Originally developed for pixel telescope in the ILC targeted EUDET initiative Fresh push by the AIDA2020 project > Central Run Control Commands and status > Producers (hardware dependent) Configure hardware, readout the data and send it to the data collector. > Data collector Receives all the data streams from the produced s and combines them into a single stream (EUDAQ 1.X) > Easy and flexible conversion of the raw output to other formats (i.e. LCIO) Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 11
EUDAQ: towards ILC common test beams > First time with different ILC calorimeters running together (Nov-Dic 2014). Using EUDAQ1.X as high level DAQ software: Each detector uses its own software (Labview, etc) for configuration and setup. EUDAQ sends the START/STOP commands collects the two streams of data and merge both in one. Online conversion to LCIO. > The syncronization between both detectors is challenging. SiECAL CCC was slaved by the AHCAL CCC. Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 12
Plans and prospects > Online monitoring (Data Quality) We are currently using ascii files written by Labview to construct control histograms → to be done within the EUDAQ framework using LCIO files (AIDA2020 WP5) > We are currently working in the development of a new BIF to timestamp events and act as master clock for combined testbeams. Based on the AIDA mini-TLU hardware Firmware modified at DESY > DAQ interfaces adaptation for Power pulsing tests. Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 13
Backup Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 14
The International Linear Collider (ILC). > Lepton-lepton collisions: Well defined initial state (no PDFs) Damping Rings e+ bunch Well known interaction energy. compressor No underlying event, pile-up e- source e- bunch compressor e+ source e-e+ → HZ, Detectors Higgs candidate Z → 2 leptons decaying to 4 electrons (ILD simulation) (ATLAS 2012)) > International Linear Collider (ILC): e+e- collider Based on superconducting RF cavities Length of 31 Km Gradient: 32 MV/m Energy 250-500 GeV (upgradable to 1TeV) Beam rate: 5 Hz between bunch trains Luminosities ~ 10 -34 cm -2 s -1 Two detectors ( ILD /SID): pull-push concept Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 15
ILC physics: precision measurements with heavy bosons. > Precision physics in the Higgs sector, and with heavy bosons: The detectors should be able to resolve hadronic heavy boson decays A 3-4% jet energy resolution is needed for 2.6-2.3 W/Z separation Roughly: factor 2 better than LEP resolution and factor 3 better than LHC resolution Irles, A. | Hamburg, DPG Spring Meeting | 29 th February 2016 First and Last Name | Title of Presentation | Date | Page 16
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