Lo w-lev el RF Con trol System Design and Ar hite ture La wren e R. Do olittle, LBNL, Berk eley , CA 94720, USA APAC 2007, session 7 ‘Accelerator Technology’ RRCAT, Indore, India, Jan 28 - Feb 2, 2007 http://recycle.lbl.gov/apac2007/ Problems worthy of attack show their worth by hitting back. -Piet Hein (1905-1996), Danish polymath
Analog, Digital, or Hybrid Measurement Σ Controller noise System Plant Σ noise single or multiple cavities normal or superconducting pulsed or CW ring or linac
100 80 pole-zero cancelling controller responses 60 40 Gain (dB) 20 cavity responses, bandwidths 50 Hz to 50 kHz 0 -20 -40 1 10 100 1000 10000 100000 1e+06 1e+07 Frequency (Hz) Gain = K P + K I s A complex system that works is invariably found to have evolved from a simple system that worked. - John Gall, U.S. author
100 80 60 40 Gain (dB) 20 0 -20 -40 1 10 100 1000 10000 100000 1e+06 1e+07 Frequency (Hz) 1 + sτ + K I K P Gain = s
housekeeping and custom functions Signal Signal ADC DAC Conditioning Conditioning FPGA Signal Signal ADC DAC Conditioning Conditioning Host I/F Host CPU or PHY Network The cheapest, fastest and most reliable components Embrace simplicity. of a computer system are those that aren’t there. Put others first. - Gordon Bell (1934-), U.S. computer engineer Desire little. - Laozi (4th century BC?), Chinese philosopher
housekeeping and custom functions Clock ADC DAC FPGA ADC DAC Host I/F LO Host CPU or PHY Network
Computer FPGA Programmable digital logic device Yes Yes Major suppliers uncountable 2 Glue-less hookup to most DAQ hardware - Yes Guaranteed low-latency processing - Yes Good programming languages Yes - Good programming requires thought and experience Yes Yes 4-input Flip look-up Flop table 1536 (US$10) to 178176 (US$6000) cells, plus routing, carry chains, multipliers, RAM, input, and output VHDL was written by a bunch of software guys who knew nothing about designing hardware. We beat on it until you could do hardware with it. Verilog was written by a bunch of hardware guys who knew nothing about designing software. We beat on it until you could do software with it. When someone says ‘I want a programming language Neither does the job they were originally intended in which I need only say what I wish done,’ give him to do, but they work. a lollipop. - David Bishop, Engineer - Alan Perlis (1922-1990), U.S. computer scientist
LO RF to Klystron DAC LO DAC Modulated Calibration Line LO phase reference Σ ADC LO Cavity 1 Field Σ ADC LO Cavity 2 Field Σ ADC Be patient, man. I’m trying to be linear. -A.L.F., fictional TV alien, 1986-1990
cavity ADC + - A DAC to Klystron r x SetR CORDIC y Set θ+ n ω T θ
cavity ADC + - A DAC to Klystron r x SetR CORDIC y Set θ+ n ω T θ Σ phase reference ADC Phase S/H Measure
cavity ADC K P +K I /s Σ DAC to Klystron r x SetR CORDIC y Set θ +n ω T θ Σ x r DDC phase reference ADC CORDIC S/H y θ (or predictive filter)
(complex) cavity ADC 1-z -2 Σ DAC to Klystron Σ Σ DDC DUC Setpoint Waveform ∫ K P +K I /s γ z -1 Σ z -1 δ z -1 - Σ z -1 z -1 z -1 Σ z -1 Σ z -1 z -1 DDR output cell ν z -1 ADC z -1 Σ z -1 δ ’ z -1 Σ z -1 z -1 Σ z -1 z -1 z -1 Σ z -1 ν Σ z -1 z -1 Setpoint Waveform Σ z -1 γ ’ z -1 z -1 z -1 What’s the difference between hardware and software? Hardware keeps getting cheaper, faster, and smaller. - Rick Cochran, U.S. system analyst
Sim ulations Physics Model with controller Language simulator Test FPGA code Bench Language simulator Driver Test FPGA Physics code Model Code Bench FPGA hardware Global Driver FPGA Physics code Model Controls Code
Global Controls Phase Reference Machine Timing LLRF Beam Diagnostics Interlocks High Power RF Additional mandatory features: • cavity detune measurement • self-test, self-cal • exception handling It is easier to move a problem around than it is to solve it. - Ross Callon, U.S. network engineer
2001 2006
Hardw are Soft w are LO cavity ADC RF to Klystron K P +K I /s Σ DAC to Klystron DAC SetR r x CORDIC LO Set θ +n ω T y θ Σ DAC Modulated Calibration Line x r DDC phase reference ADC CORDIC y S/H θ LO (or predictive filter) phase reference Σ ADC LO Cavity 1 Field Σ ADC LO Cavity 2 Field Σ ADC Perfection is achieved, not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exup´ ery (1900-1944), French writer and aviator
Thank y ou for y our atten tion! A kno wledgmen ts Alex Ratti Brian Chase Mark Champion Taylor Davidson Hengjie Ma Chip Piller Stefan Simrock John Staples Yubin Zhao Image credits: Wikipedia, Wiley Miller This talk is online at http://recycle.lbl.gov/apac2007/ I have only made this letter rather long because I have not had time to make it shorter. - Blaise Pascal (1623-1662), French mathematician and philosopher
Recommend
More recommend
