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What A CPU Does All Day Fetch from memory the instruction whose address is given in the PC. Increment the PC. Execute the instruction. Repeat. Chapter 3

  1. ✄ ☎ ✆ ✆ � � � ✆ ✁ ✄ ✝ ✄ ☎ ☎ What A CPU Does All Day • Fetch from memory the instruction whose address is given in the PC. • Increment the PC. • Execute the instruction. • Repeat. Chapter 3 Instructions perform operations on data in the registers, or move data between the registers and memory. 1 3 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College MIPS Hardware 32 Registers, Each 32 Bits Name Number Usage $zero $0 The constant value 0 32 bits $at $1 Reserved for assembler 0 0 $v0–$v1 $2–$3 Return values 1 2 $a0–$a3 $4–$7 Arguments 3 32−bit addresses 4 $t0–$t7 $8–$15 Temporaries Data and 5 hi $s0–$s7 $16–$23 Saved 6 lo Instructions 7 $t8–$t9 $24–$25 More temporaries ✆✂✝ ✄✂☎ �✂✁ $tk0–$k1 $26–$27 Reserved for OS 29 $gp $28 Global pointer 30 31 $sp $29 Stack pointer PC $fp $30 Frame pointer $ra $31 Return address CPU Memory 2 4 (Byte−Oriented) CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  2. Instruction Types Immediate Arithmetic Instructions Perform operations on a 32-bit register and a 16-bit Arithmetic and Logical constant. • Regular and immediate. • With and without overflow. May operate on any register and store in any other. They • Bitwise logical operations. may be the same register. Shift The first register is the destination. Compare-and-Set addi $t7, $s5, 17 Jump and Branch addi $t2, $10, 0x493 Load and Store addi $a1, 99 Floating Point The last one assumes a1 is both source and destination. Described in Appendix A 5 7 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Arithmetic Instructions Logical Instructions Perform operations on 32-bit values stored in registers. Take the same forms as arithmetic operations. Operate on any two registers and store the result in a third. Perform bitwise operations. Register names need not be unique. 1 0 1 1 0 1 0 1 and 0 1 1 0 1 1 0 0 The first register is the destination. 0 0 1 0 0 1 0 0 sub $s1, $t3, $t7 1 0 1 1 0 1 0 1 mul $s1, $s1, $t2 or 0 1 1 0 1 1 0 0 1 1 1 1 1 1 0 1 addu $t5, $t5, $t5 or $s2, $a0, $t1 The u means “unsigned.” andi $t2, $t1, 0x45ab 6 8 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  3. Shift Instructions Compare-and-Set Instructions Shift moves the bits over to the left or right. Compare registers. Bits moved past either end are discarded. Produce a result value which is 1 or 0 (C-style boolean). Evacuated bit positions are filled with zeros for left shifts Take the same forms as arithmetic operations. and logical shifts. sgt $s2, $t6, $t5 Right arithmetic shift fills with copies of the sign bit. slti $t5, $a2, 10 Effect is to multiply or divide by a power of two, if the result fits. sra $5, $t4, 3 sllv $s1, $s5, $t1 9 11 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Jump and Branch Instructions Shift Examples Move execution to another point in the program. These are 8-bit examples. The MIPS performs 32-bit shifts. Jump and branch set the pc. Number Left 3 Branch instructions are conditional. bin dec bin dec 00001110 14 01110000 112 j fred 11110100 -12 10100000 -96 beq $s1, $t1, barney 01111001 121 11001000 -56 Number Log. Right 2 Arith. Right 2 bin dec bin dec bin dec 00010110 22 00000101 5 00000101 5 11011000 -40 00110110 54 11110110 -10 01101100 108 00011011 27 00011011 27 10 12 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  4. Load and Store Instructions Other Instructions Move (copy) data between register and memory. Copy A Register Memory address is the sum of a register and a constant move $10, $t1 offset. lw $7, 12($s1) Floating Point Instructions sb $t3, 0($t4) We do not study these. Come in one-, two- and four-byte sizes. Real Computer Scientists Don’t Do Floating Point. Address must be a multiple of the size. Store is the only MIPS assembler instruction where data moves from left to right. 13 15 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Immediate Load Instructions Count Down From Ten . . . Load a constant into a register. top: li $t1, 10 # Set $t1 to 10. Do not access memory, other than the instruction itself. beqz $t1, out # Leave when not 0. addi $t1, $t1, -1 # Decr. $t1 li $a2, 123 j top # Repeat la $22, fred out: . . . 14 16 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  5. Find Zero In An Array Stack . . . next: la $t1, arr # Get array addr. lw $t2, 0($t1) # Get word beqz $t2, found # Leave when not 0. addi $t1, $t1, 4 # Incr. address 20($sp) j next # Repeat found: 16($sp) . . . 12($sp) Grows .data 8($sp) .align 2 arr: 4($sp) .word 17, 23, 34, 11, 873, 0 $sp 0($sp) . . . Lower Memory Addresses 17 19 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Stack Pushing Values Running programs have a stack for general storage and Pushing one value: function calls. addiu $sp, $sp, -4 # Make space. • Stored in memory. sw $s1, 0($sp) # Store value there. • Top denoted by $sp . Pushing several values: • Top is at the smallest address. addiu $sp, $sp, -12 # Make space for all. sw $s1, 8($sp) # Store each value. • MIPS has no special stack operations. sw $s2, 4($sp) sw $ra, 0($sp) Note: subu $sp, $sp, n abbreviates addiu $sp, $sp, -n . 18 20 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  6. Popping Values Passing Arguments Popping one value: • Arguments are passed in $a0 through $a3 . • Return value(s) are left in $v0 and $v1 . lw $s1, 0($sp) # Recover value. addiu $sp, $sp, 4 # Release space. . . . Popping several values: move $a0, . . . # Give argument. jal fred lw $s1, 8($sp) # Recover each value. . . . # Use $v0. lw $s2, 4($sp) fred: lw $ra, 0($sp) . . . # Use $a0. addiu $sp, $sp, 12 # Release all space. move $v0, . . . # Produce return value. jr $ra 21 23 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Calling Use Of Registers By Functions Call and return: Caller and callee share a single set of registers. • jal name places address of next instruction in $ra and • Caller expects $s n registers to be preserved across a transfers to name . call. • jr $ra returns by transferring to the address given in • Caller may not expect other registers to be preserved. $ra . • Callee usually saves $s n registers it uses on the stack. . . . Performing a call always uses $ra . jal fred # Go to fred after putting . . . # this addr in $ra. • A function which calls another must preserve $ra for its fred: own return. . . . # Do something useful jr $ra # Go to instr after jal • Functions often save $ra on the stack. 22 24 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  7. Typical Function Form Calling the Operating System Functions generally have the following form: Uses a special instruction syscall . funcname: Available functions depend on OS. addiu $sp, -16 # Make enough space. For SPIM, See p. A-48, 49. sw $ra, 0($sp) # Save return addr. sw $s0, 4($sp) # Save s regs we use. Printing an integer: sw $s1, 8($sp) sw $s4, 12($sp) . . . # Do whatever. li $a0, 17 # Integer to print done: li $v0, 1 # Code for print int lw $s4, 12($sp) # Restore s regs. syscall # Call OS lw $s1, 8($sp) lw $s0, 4($sp) lw $ra, 0($sp) # Restore $ra. addiu $sp, 16 # Release space. jr $ra # Return. 25 27 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Other Stack Uses Instruction Coding Functions may use the stack for general storage. Instructions are coded in binary for storage in memory. • Local variables. • Compiler temps. In MIPS, every instruction is represented by a 32-bit number. Functions may wish to store $a n registers to free them for its own calls. Three different formats are used depending on the instruction type. If more than four arguments are passed, they are pushed on the stack by the caller. 26 28 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

  8. Coding Format R Coding Format J 32 bits 32 bits op sreg1 sreg2 destreg shft amt funct op address J R 6 26 6 5 5 5 5 6 j fred # fred is located at address 0x568ab7c add $10,$4,$5 2 0x15a2adf 0 4 5 10 0 0x20 Low two bits of target address are implied; not stored 0x00855020 sll $8,$9,7 0x095a2adf 0 0 9 8 7 0 0x000941c0 29 31 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College Multiplies and Divides Coding Format I Additional 32-bit registers hi and lo . 32 bits op Rbase Rdest Offset I Multiply two 32-bit registers into 64-bit combination hi , lo . 6 5 5 16 mult r1, r2 lw $8, 25($11) Quotient in lo , remainder in hi . 0x23 11 8 25 div r1, r2 : 0x8d680019 Move from hi (or lo ) into a regular register r . beq $5,$7, fred # fred is 104 instrs (416 bytes) ahead mfhi r 4 5 7 104 mflo r 0x10a70068 addi $10,$6,245 8 6 10 245 0x20ca00f5 30 32 CSc 314 · T W Bennet · Mississippi College CSc 314 · T W Bennet · Mississippi College

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