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Today Memory Management Segmentation, Paging Improving memory - PDF document

Today Memory Management Segmentation, Paging Improving memory performance MMU Translation Lookaside Buffer Dec 3, 2018 Sprenkle - CSCI330 1 Review What abstraction does virtual memory provide? What requirements do we


  1. Today • Memory Management Ø Segmentation, Paging • Improving memory performance Ø MMU Ø Translation Lookaside Buffer Dec 3, 2018 Sprenkle - CSCI330 1 Review • What abstraction does virtual memory provide? • What requirements do we have for the VM, from the various stakeholders? • What is paging? Segmentation? Ø What are they used for? Ø Compare and contrast them • How does the OS translate from the virtual address to the physical address? Cody Watson, William & Mary “An Introduction to Deep Learning and Its Applications” Talk at 4 p.m. Dec 3, 2018 Sprenkle - CSCI330 2 1

  2. The Big Picture: Virtual Memory How can the OS build the abstraction of a private, potentially large address space for multiple running processes (all sharing memory) on top of a single, physical memory? Dec 3, 2018 Sprenkle - CSCI330 3 Review: Address Translation: Wish List • Map virtual addresses to physical addresses • Allow multiple processes to OS OS be in memory at once, but Text Process 1 isolate them from each other Data Process 3 • Determine which subset of Heap Process 2 data to keep in libc code memory/move to disk Process 1 • Allow the same physical memory to be mapped in multiple process VASes Stack • Make it easier to perform placement in a way that reduces fragmentation Dec 3, 2018 Sprenkle - CSCI330 4 2

  3. Review: (Unrealistic) Translation Example • Process P 2 ’s virtual addresses don’t align with physical memory’s addresses 0 base P 2 • Consider: P 2 wants to access base + address 0x1000 P 1 • Determine offset from physical address 0 to 0 P 3 P 2 start of P 2 P 2max Phy max Ø store in base Dec 3, 2018 Sprenkle - CSCI330 5 Review: Generalizing • Problem: process may not fit in one contiguous region • Solution: keep a table (one per 0 process) Perm Base P 2 Ø Keep details for each region in a R, X row R … Ø Store additional metadata (ex. R, W P 2 permissions) ? 0 • Interesting questions: … P 2 P 2 Ø How many regions should there be (and what size)? P 2max Phy max Ø How to determine which table entry we should use? Dec 3, 2018 Sprenkle - CSCI330 6 3

  4. Review: Defining Regions • Segmentation: Ø Partition address space and memory into logical segments Ø Segments have varying sizes • Paging: Ø Partition address space and memory into pages Ø Pages are a constant, fixed size Dec 3, 2018 Sprenkle - CSCI330 7 Review: Fragmentation Internal External OS • Process asks for memory, • Over time, we end up doesn’t use it all with small gaps that become more • Possible reasons: difficult to use Ø Process was wrong about Ø eventually, wasted needs Ø OS gave it more than it asked • external : unused for memory between • internal : within an allocation allocations Used Unused Memory allocated to process Dec 3, 2018 Sprenkle - CSCI330 8 4

  5. Review: Segmentation vs. Paging • A segment is good logical unit of information Ø Can be sized to fit any contents Ø Easy to share large regions (e.g., code, data) Ø Protection requirements correspond to logical data segment • A page is good physical unit of information Ø Simple physical memory placement Ø No external fragmentation Ø Constant sizes make it easier for hardware to help Dec 3, 2018 Sprenkle - CSCI330 9 Review: For Both Segmentation and Paging… • Each process has a table to track memory address translations • When a process attempts to read/write to memory: Ø use high order bits of virtual address to determine which row to look at in the table Ø use low order bits of virtual address to determine an offset within the physical region Dec 3, 2018 Sprenkle - CSCI330 10 5

  6. Review: Performance Implications Virtual Address Upper bits Lower bits Which row? Offset into region Without VM: Go directly to address in memory With VM: Meta Phy Loc Perm … Table Do a lookup in memory to determine which address to use Physical Address Physical Concept: level of indirection Memory Dec 3, 2018 Sprenkle - CSCI330 11 Defining Regions - Two Approaches • Segmentation: Ø Partition address space and memory into logical segments Ø Segments have varying sizes • Paging: Ø Partition address space and memory into pages Ø Pages are a constant, fixed size Dec 3, 2018 Sprenkle - CSCI330 12 6

  7. Segment Table • One table per process • Where is the table located in memory? Ø Segment table base register (STBR) Ø Segment table size register (STSR) • Table entries: Segment metadata Ø V: valid bit STBR V Base Bound Perm … STSR • does it contain a mapping? Ø Base: segment location in physical memory Ø Bound: segment size in physical memory Ø Permissions Dec 3, 2018 Sprenkle - CSCI330 13 Segment Address Translation Virtual Address Segment s Offset i … • Physical address: Physical Address base of s + i Dec 3, 2018 Sprenkle - CSCI330 14 7

  8. Check if Segment s is within Range Virtual Address Segment s Offset i STBR STSR … s < STSR Physical Address Dec 3, 2018 Sprenkle - CSCI330 15 Check if Segment Entry s is Valid Virtual Address Segment s Offset i STBR STSR … V == 1 Physical Address Dec 3, 2018 Sprenkle - CSCI330 16 8

  9. Check if Offset i is within Bounds Virtual Address Segment s Offset i STBR STSR … i < Bound Physical Address Dec 3, 2018 Sprenkle - CSCI330 17 Check Permissions Virtual Address Segment s Offset i STBR STSR … Perm? Physical Address Dec 3, 2018 Sprenkle - CSCI330 18 9

  10. Translate Address Virtual Address Segment s Offset i STBR STSR … + Physical Address Dec 3, 2018 Sprenkle - CSCI330 19 Pros and Cons of Segmentation Pros Cons Dec 3, 2018 Sprenkle - CSCI330 20 10

  11. Pros and Cons of Segmentation Pros Cons • Each segment can be • Variable-size allocation Ø located independently Ø Difficult to find holes in physical memory Ø separately protected Ø External fragmentation Ø grown/shrunk independently • Small segment table size Ø ~256 Bytes à 1GB memory Dec 3, 2018 Sprenkle - CSCI330 21 Defining Regions - Two Approaches • Segmentation: Ø Partition address space and memory into logical segments Ø Segments have varying sizes • Paging: Ø Partition address space and memory into pages Ø Pages are a constant, fixed size Dec 3, 2018 Sprenkle - CSCI330 22 11

  12. Paging Terminology • For each process, the virtual address space is divided into fixed-size pages • For the system, the physical memory is divided into fixed-size frames • The size of a page is equal to that of a frame Ø Often 4 KB in practice Ø Some CPUs allow for small and large pages at the same time Dec 3, 2018 Sprenkle - CSCI330 23 Page Table • One table per process • Table parameters in memory V R D Frame Perm … PTBR Ø Page table base register PTSR Ø Page table size register • Table elements: Page metadata Ø V: valid bit Ø R: referenced bit Ø D: dirty bit • If page has been modified Ø Frame: location in physical memory Ø Perm: access permissions Dec 3, 2018 Sprenkle - CSCI330 24 12

  13. Paging Address Translation Virtual Address Page p Offset i V R D Frame Perm … • Physical address = frame of p + offset i Physical Address Why do we just need the frame number, rather than the location? Dec 3, 2018 Sprenkle - CSCI330 25 Paging Address Translation Virtual Address Page p Offset i V R D Frame Perm … • Physical address = frame of p + offset i Physical Address Frames are all the same size Only need to store the frame number in the table, not exact address! Dec 3, 2018 Sprenkle - CSCI330 26 13

  14. Check if Page p is Within Range Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … p < PTSR Physical Address Dec 3, 2018 Sprenkle - CSCI330 27 Check if Page Table Entry p is Valid Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … V == 1 Physical Address Dec 3, 2018 Sprenkle - CSCI330 28 14

  15. Check if Operation is Permitted Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … Perm? Physical Address Dec 3, 2018 Sprenkle - CSCI330 29 Translate Address Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … concat Physical Address Dec 3, 2018 Sprenkle - CSCI330 30 15

  16. Physical Address by Concatenation Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … concat Physical Address Dec 3, 2018 Sprenkle - CSCI330 31 Physical Address by Concatenation Virtual Address Page p Offset i PTBR PTSR V R D Frame Perm … concat Physical Address Frame f Offset i Dec 3, 2018 Sprenkle - CSCI330 32 16

  17. Pros and Cons of Paging Pros Cons Dec 3, 2018 Sprenkle - CSCI330 33 Pros and Cons of Paging Pros Cons • Each page can be • Large table size Ø located independently Ø ~4MB for 1GB of memory • That’s for each process! Ø separately protected • maybe internal • Fixed-size pages and frames fragmentation Ø No external fragmentation Ø No difficult placement decisions Dec 3, 2018 Sprenkle - CSCI330 34 17

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