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The CMS Track Trigger and the Processing of its Data Christian Amstutz Institute for Data Processing and Electronics (IPE) 0 22.2.2016 KIT University of the State of Baden-Wuerttemberg and www.kit.edu National Research Center of the


  1. The CMS Track Trigger and the Processing of its Data Christian Amstutz Institute for Data Processing and Electronics (IPE) 0 22.2.2016 KIT – University of the State of Baden-Wuerttemberg and www.kit.edu National Research Center of the Helmholtz Association

  2. So many Particles! Recorded Event (2012) Simulation for HL-LHC (2025) 1 22.2.2016

  3. So many Particles! Recorded Event (2012) Simulation for HL-LHC (2025) ≈ 10 cm High-Luminosity LHC: Concurrent Collisions: up to 200 Number Tracks: ≈ 10000 1 22.2.2016

  4. The Current CMS Silicon Tracker 2 22.2.2016

  5. Evolution of Channels in Silicon Trackers 10 10 Number of strip channels CMS - Phase 2 10 8 ATLAS - Phase 2 CMS ATLAS DØ 10 6 GLAST CDF-II DELPHI (96) AMS-02 Zeus CDF-I Mark II 10 4 NA11/NA32 1980 1990 2000 2010 2020 2030 Silicon detectors: 1.7 times more channels every two years Moore’s law: 2 times more transistors every two years 3 22.2.2016

  6. The CMS Silicon Tracker for HL-LHC 4 22.2.2016

  7. The Trigger System of CMS – today Outer Electromagnetic Hadron Muon Silicon Tracker Calorimeter Calorimeter Chambers Front-end Pipeline Front-end Pipeline Front-end Pipeline Front-end Pipeline Level 1 Trigger Read-out Buffer High-Level Trigger Event Buffer Storage 5 22.2.2016

  8. The Trigger System of CMS – at the HL-LHC Outer Electromagnetic Hadron Muon Silicon Tracker Calorimeter Calorimeter Chambers Track Trigger Front-end Pipeline Front-end Pipeline Front-end Pipeline Front-end Pipeline 40 MHz (12.5 us) Level 1 Trigger <1 MHz Read-out Buffer (160 ms) High-Level Trigger Event Buffer < 1 kHz Storage 5 22.2.2016

  9. Challenges of the CMS Track Trigger Bunch collision rate: 40 MHz Data rate produced by the detector: 11’200 Tbit/s Data rate transmitted to Track Trigger: 50 Tbit/s Optical Fibers: 15000 Latency (Sensor - L1 Trigger - Sensor): < 12.5 us Goal: Providing High-Energy Tracks to the Level-1 Trigger. 6 22.2.2016

  10. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  11. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  12. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  13. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  14. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  15. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): 7 22.2.2016

  16. An Approach using Associative Memories (AM) Working principle of Content Addressable Memories (CAM): Very fast lookup whether content is available 7 22.2.2016

  17. Stacked Modules and Stubs Accepted particles: p T > 3 GeV B High-momentum Particle Low-momentum Particle 8 22.2.2016

  18. Arranging the Tracker Data BX=1 BX=2 BX=3 BX=4 9 22.2.2016

  19. Track Finding by Associative Memory Patternbank 10 22.2.2016

  20. Track Finding by Associative Memory Patternbank Compare 10 22.2.2016

  21. Track Finding by Associative Memory Patternbank Compare 10 22.2.2016

  22. Event Building 11 22.2.2016

  23. Event Building 11 22.2.2016

  24. Event Building 11 22.2.2016

  25. Track Fitting by Linearized Fit Pre-calculated Constants A , B , C , D , E , F Track Parameters: Z 0 : Origin on Z-axis A · hit 1 + B · hit 2 + ... + F · hit 6 C : Curvature φ 0 : ∡ to XZ-plane y θ : ∡ to XY-plane x 1 C z 0 } φ 0 θ z 12 22.2.2016

  26. 13 22.2.2016

  27. System Simulation I Idea: Model an essential part of the CMS Track Trigger electronics Goals: Evaluation of system properties (latencies, link bandwidths, ...) Evaluation of system architectures Generation of test vectors for hardware debugging Realization Realized in SystemC (a C++ library) All existing modules, but not all details Parameters of modules configurable 14 22.2.2016

  28. System Simulation I Idea: Model an essential part of the CMS Track Trigger electronics Goals: Evaluation of system properties (latencies, link bandwidths, ...) Evaluation of system architectures Generation of test vectors for hardware debugging Realization Realized in SystemC (a C++ library) All existing modules, but not all details Parameters of modules configurable One sector of the Track Trigger has been simulated 14 22.2.2016

  29. System Simulation II Cabling Component Patterns Scheme Con fi guration Trigger Tower ATCA Blade Sensor Module AM Processing DTC Board Processor Organizer Sensor Module Data Organizer AM Processing Sensor Module Board DTC AM Processing Sensor Module Board Sensor Module AM Processing DTC Board Sensor Module Output ATCA Blade Input Tracks Sensor Module Hits AM Processing DTC Board Processor Organizer Sensor Module Data Organizer AM Processing Sensor Module Board DTC AM Processing Sensor Module Board Sensor Module AM Processing DTC Board Sensor Module Sensor Module DTC Sensor Module DTC Sensor Module DTC Sensor Module DTC 15 22.2.2016

  30. FPGA — Programmable Digital Chips ... a very very brief introduction F ield- P rogrammable G ate A rray 16 22.2.2016

  31. FPGA — Programmable Digital Chips ... a very very brief introduction F ield- P rogrammable G ate A rray clk Lookup Table in1 Flip-Flop Selector in2 out in3 in4 16 22.2.2016

  32. FPGA — Programmable Digital Chips ... a very very brief introduction F ield- P rogrammable G ate A rray clk Lookup Table in1 Flip-Flop Selector in2 out in3 in4 16 22.2.2016

  33. FPGA — Programmable Digital Chips ... a very very brief introduction F ield- P rogrammable G ate A rray clk Lookup Table in1 Flip-Flop Selector in2 out in3 in4 16 22.2.2016

  34. FPGA — Programmable Digital Chips ... a very very brief introduction F ield- P rogrammable G ate A rray clk Lookup Table in1 Flip-Flop Selector in2 out in3 in4 multiply_vectors(a[1000], b[1000]) for i = 1 to 1000 c[i] = a[i] * b[i] return c 16 22.2.2016

  35. Electronic System behind the Data Processing BX=3 BX=4 10 Gbps 100 Gbps Sensor Module MTCA crate ATCA crate Pulsar-IIb Board AM Board 15000 72 48 550 2200 17 22.2.2016

  36. The Pattern Recognition Mezzanine 18 22.2.2016

  37. Cost Estimation for the Track Trigger 1 ATCA crate 8k e Cables and transceivers 24k e 12 ATCA blades: 12 Printed Circuit Boards 36k e 12 FPGAs 64k e 12 AM Chip sets 64k e 196k e 19 22.2.2016

  38. Cost Estimation for the Track Trigger 1 ATCA crate 8k e Cables and transceivers 24k e 12 ATCA blades: 12 Printed Circuit Boards 36k e 12 FPGAs 64k e 12 AM Chip sets 64k e 196k e Total equipment cost: 48 crates * 196k e = 9.4M e 19 22.2.2016

  39. Conclusion One of the most complex electronic systems ever built Contributions of many groups are necessary Very competitive spirit between different groups The Track Trigger is essential for CMS HL-LHC 20 22.2.2016

  40. Thank you for your attention source: www.xkcd.com 21 22.2.2016

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