Originally published in the Proceedings of SMTA International, Ft. Worth, TX, October, 2013 STENCIL AND SOLDER PASTE INSPECTION EVALUATION FOR MINIATURIZED SMT COMPONENTS Robert Farrell Benchmark Technologies Nashua, NH USA Chrys Shea Shea Engineering Services Burlington, NJ USA ABSTRACT new packages, pad designs, solder paste print New stencil materials and manufacturing technologies performance and process evaluation tests. The devices promise improved performance over traditional options. selected for analysis in these tests included 0.3, 0.4 and To determine the best technologies for a contract .5mm BGAs and 0201s. Their area ratios ranged from electronics manufacturer assembling miniaturized SMT 0.5 to 0.75. Locations and names of the specific components, a test was designed to assess the devices used in the stencil analysis are shown in figure performance of 11 different stencils, submitted by 3 2. different suppliers, using a variety of materials and coatings. Performance metrics include print volume repeatability and transfer efficiency for 0.5mm and 0.4mm pitch BGAs and for 0201 components with area ratios in the challenging range from 0.5 to 0.66. The test also evaluated two methods of automated solder paste inspection to determine the accuracy and repeatability of the different machines and technologies at feature sizes of 10 mil or less. Setup, execution and results of both sets of tests are presented and discussed. INTRODUCTION SMT stencil printing technology continually evolves to keep pace with device miniaturization technologies. Printed Circuit Board (PCB) assemblers have numerous Figure 1. Test Vehicle new technology options to choose from, and need to determine the most effective ones to produce the highest quality and most reliable solder interconnections. The objective of these tests was to identify the best stencil technology for high volume production of miniaturized SMT components. The testing grew to include comparison of Type 4 and Type 5 solder pastes, evaluation of SPI accuracy and assessment of aperture wall topographies. The SPI evaluation portion of this study used three different SPI machines from 2 different suppliers. 2 of the machines were from a single supplier but were different models and ages. The other machine was Figure 2. Features used in stencil analysis from another supplier. Test Design EXPERIMENTAL SETUP The stencil analysis included: Test Vehicle 3 different stencil suppliers The test vehicle shown in figure 1 was designed in- 3 different foil materials house for a multitude of PCB assembly tests, including 3 different manufacturing processes
Originally published in the Proceedings of SMTA International, Ft. Worth, TX, October, 2013 2 different nanocoatings in-line, automatic board washer and inspected before each test. The experimental design was not a full factorial. Each In addition to the print tests, an additional, abbreviated supplier provided stencils using technologies that were either their top performers or developmental leg was added to the DOE that compared the print performance of Type 4 and Type 5 solder pastes. technologies that they wanted to learn more about. Three to five stencils were submitted by each supplier. As the experiment progressed, an evaluation of SPI accuracy was planned and executed and an analysis of A total of 11 stencils were print tested. All were created using the same Gerber file, and all were the aperture wall topography were added. They will be specified at 0.0040” thick. The final test matrix is described in a later section. shown in table 1. MEASUREMENTS AND METRICS Table 1. Stencil test matrix. The three different The performance of the stencils was measured using basic print measurement and evaluation techniques. vendors are designated A, B and C. All the paste deposits were measured using a new SPI system that promised improved accuracy over existing technology. It is described in a later section as Machine #2. The ten-print tests produced 1000 data points for each of the 100 I/O device types on each stencil, and 5470 data points for the 547 I/O device. The measured volumes for each device were used to calculate average volumes and Coefficients of Variation (CV = std deviation divided by mean, %) in a spreadsheet. Whereas the average print volumes provide information on the stencil’s paste release characteristics, the CVs provide comparative data on volume repeatability. Aperture sizes were measured with an Acugage model HPL 25-3-LT4. For each device on each stencil, 5 apertures were measured on both the squeegee and PCB side of the stencil. The five measurements from each side were averaged and used in the aperture volume and area ratio calculations. Abbreviations for the materials in table 1 are as After completing the print tests, measurement coupons follows: were laser cut outside the four corners of the print area. FG: Datum Fine Grain 301 Stainless Steel A micrometer was used to measure the thickness of (SS) each coupon; the average was used in aperture volume PhD: Datum 304 SS and area ratio calculations. FG, Ni Plated: Ni over FG Laser Ni: Electroformed Ni that has been laser To account for any trapezoidal stencil wall geometries, cut aperture volumes and area ratios were calculated using E-form: Electroformed Ni formulas for truncated cones and pyramids. Nano2: DEK NanoProtek, 2-part wipe-on Transfer efficiencies (TEs) are calculated as the average coating solder paste deposit volume divided by the aperture Nano1: Laserjob thermally cured nanocoating volume that was calculated from the aperture measurements. They represent the percentage of solder During this first phase of the experiment, all 11 stencils were printed over a two- day span at Benchmark’s paste that was released from the aperture. They are calculated for each of the 5 devices shown in figure 2 Nashua, NH facility on DEK 265 stencil printers with for each stencil tested. manually placed pin supports, by the same operator. A no-clean, Type 4, SAC305 solder paste was used. The Area ratios (ARs) are calculated as the area of the underside of the stencil was wiped between each of ten stencil apertures’ circuit side opening divided by the consecutive prints. PCBs were serialized and printed in area of the apert ures’ walls. These were also calculated the same order for each run. They were cleaned in an for each of the 5 devices on each stencil.
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