Random Number Generator using FPGA David P erez Mart nez Centro - PowerPoint PPT Presentation

Random Number Generator using FPGA David P´ erez Mart´ ınez Centro de Investigaci´ on en Computaci´ on - IPN

Introduction ◮ A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer. ◮ The FPGA configuration is generally specified using a hardware description language (HDL) [1]. Figure: Digilent Company

Hardware Nexys 4 DDR ◮ Inputs ◮ 16 Switches ◮ UART (Rx) ◮ GPIO ◮ Outputs ◮ 16 LEDs ◮ 8 7-Segment Display ◮ 5 Push Buttons ◮ UART (Tx)

FPGA Architecture ◮ Control Unit ◮ Read inputs ◮ Execute PRNG algorithm ◮ Show result value in Displays ◮ PRNG ◮ Linear congruential generator [2] ◮ X n +1 = ( aX n + c ) mod ( m ), where ◮ m - the ”modulus” ◮ a - the ”multiplier” ◮ c - the ”increment” ◮ X 0 - the ”seed”

Sequence Diagram Control unit execute all instruction in order to synchronize the architecture.

Architecture Figure: Actual architecture

Task to do ◮ Verify quality of numbers generated using histograms. ◮ Add communication between FPGA and PC (UART) ◮ Store numbers in RAM memory ◮ Program Hadamard Transform.

Architecture Proposal Figure: Architecture Proposal

References I V. A. Pedroni, Circuit Desing with VHDL . 2004. D. Knuth, The Art of Computer Programming . 1997.