Quad module development for pixel layer upgrades Katie Dunne Student Instrumentation Meeting - July 21 2017
FE-I4B Quad Module ● RD53A arrives September this year ● Preparation for arrival of RD53A has been building test quad modules using FEI4B ● Provides experience with flex circuit board design, module handling/loading ● Baseline power distribution design for HL-LHC is serial power ● FE-I4B contains regulators suitable for serial power distribution (like RD53A) Student Instrumentation Meeting Katie Dunne 2
Quad Module Design Data Acquisition System Digital Analog Regulator Regulator Vout Vin 36 mm 42 mm Student Instrumentation Meeting Katie Dunne 3
Shunt-LDO Regulators Internal Resistor 8k / 16k Analog / Digital External Resistor Fig. FEI4B Integrated Circuit Guide v2.3 Shunt Circuit ● Shunt maintains constant current mode by burning excess current ● External resistors chosen so that ○ Analog Current = 350 mA ○ Digital Current = 150 mA Student Instrumentation Meeting Katie Dunne 4
Shunt-LDO Regulators Performance Measured current fluctuation during front end configuration of one module PrmpVbp GDAC controls analog current - higher PrmpVbp ~ higher analog current FEC shunt circuit not connected Other FEs shunt current up to break down after PrmpVbp ~80 Student Instrumentation Meeting Katie Dunne 5
Quad Module Status Name Sensor Functionality Comment QM_1_Rosencrantz Dummy (not bump bonded) FEA, FEB, FEC, FED QM_2_Guildenstern Dummy (not bump bonded) FEA, FEB, FEC, FED - - FEB, FEC, FED FEA readout errors QM_3_Titania - FEA, FEB, FEC, FED QM_4_Oberon - - - - - All FEs readout errors. QM_5_Hippolyta experimental wire bonding but shouldn’t affect readout Student Instrumentation Meeting Katie Dunne 6
Tuning: Quad Module 4 C A B D Student Instrumentation Meeting Katie Dunne 7
Minimum Threshold All FEs tuned to 1500e Decrement threshold GDAC by 1 Minimum Threshold : <1% of pixels are noisy Count pixels with Noise Scan Noise hit occupancy > 10 -7 Student Instrumentation Meeting Katie Dunne 8
Minimum threshold: Lowest GDAC before 1% of pixels are noisy 581 ± 59 e - FEA 1238 ± 42 e - FEB 581 ± 59 e - 714 ± 52 e - FEC 1238 ± 42 e - 531 ± 102 e - FED 714 ± 52 e - 531 ± 102 e - 1% of pixels Student Instrumentation Meeting Katie Dunne 9
Noise Occupancy: QM_1_Rosencrantz (dummy) Student Instrumentation Meeting Katie Dunne 10
Source Scan Bias Voltage: -70V Source: Strontium-90 1.5 hour Self Trigger Scan -70V Bias 2.1V Vin D B C A Student Instrumentation Meeting Katie Dunne 11
RD53A Quad and Single Chip Flex FEI4B RD53A Student Instrumentation Meeting Katie Dunne 12
Documentation Student Instrumentation Meeting Katie Dunne 13
Next Steps: Serial Power Student Instrumentation Meeting Katie Dunne 14
Recommend
More recommend