Paper presentation � Ultra-Portable Devices Paper: CH. Winstead, N. Nguyen, V. Gaudet, CH. Schlegel. Low-Voltage CMOS Circuits for Analog Iterative Decoders. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, REGULAR PAPERS, vol. 53, no. 4, April 2006, pages 829-841. Presented by: Reza Meraji 2010-02-03 Paper Presentation - Ultra Portable Devices 1
Outline � Decoding Circuits based on sum-product algorithm � Canonical topology � Low voltage topology � Decoder architectures � Trellis � Tanner Graph � Example decoder implementations � Performance results 2010-02-03 Paper Presentation - Ultra Portable Devices 2
Sum-Product Algorithm 2010-02-03 Paper Presentation - Ultra Portable Devices 3
Canonical Sum-Product Circuit 2010-02-03 Paper Presentation - Ultra Portable Devices 4
Canonical Sum-Product Circuit: Source Connected Transistor Array 2010-02-03 Paper Presentation - Ultra Portable Devices 5
Re-normalization Circuit 2010-02-03 Paper Presentation - Ultra Portable Devices 6
A Slice of the Canonical Topology 2010-02-03 Paper Presentation - Ultra Portable Devices 7
Low Voltage Sum-Product Circuit Topology 2010-02-03 Paper Presentation - Ultra Portable Devices 8
Allowable Supply Voltages 2010-02-03 Paper Presentation - Ultra Portable Devices 9
Difference in Minimum Supply Voltage 2010-02-03 Paper Presentation - Ultra Portable Devices 10
Decoder Architectures: Trellis Decoders (Hamming Code) 2010-02-03 Paper Presentation - Ultra Portable Devices 11
Low-Voltage Circuit for Trellis Decoding 2010-02-03 Paper Presentation - Ultra Portable Devices 12
LDPC (Tanner Graph) Decoders Tanner graph for an (8,4) Hamming code Implementation of equality and parity-check nodes for LDPC-style decoders 2010-02-03 Paper Presentation - Ultra Portable Devices 13
Die micro photograph of chip: showing the factor graph decoder , the Trellis decoder, and the I/O interfaces 2010-02-03 Paper Presentation - Ultra Portable Devices 14
Decoder Implementations Summary 2010-02-03 Paper Presentation - Ultra Portable Devices 15
Serial I/O Interface 2010-02-03 Paper Presentation - Ultra Portable Devices 16
I/O Timing: Transient Response 2010-02-03 Paper Presentation - Ultra Portable Devices 17
Experimental Setup 2010-02-03 Paper Presentation - Ultra Portable Devices 18
Performance results: for the Tanner graph (TG) and T rellis (TR) decoders 2010-02-03 Paper Presentation - Ultra Portable Devices 19
Measured results: Showing performance as a function of supply voltage and speed for the Tanner graph decoder 2010-02-03 Paper Presentation - Ultra Portable Devices 20
Measured results: Showing performance as a function of supply voltage and speed for the Trellis graph decoder 2010-02-03 Paper Presentation - Ultra Portable Devices 21
Energy Efficiency Figures: Of Digital (top 2) and Analog Decoders (bottom 4) 2010-02-03 Paper Presentation - Ultra Portable Devices 22
Comparison of Eb/N0 losses: For the Tanner graph (TG) and T rellis (TR) decoders at different Vdd as a function of clock speed 2010-02-03 Paper Presentation - Ultra Portable Devices 23
Summary � Overview of low power CMOS analog circuits f or iterative decoding � A new topology for reducing supply voltage by at least 0.4 V � Proposed topology used to implement two types of decoders � The Trellis decoder achieved the lowest energy per bit of any reported iterative decoder 2010-02-03 Paper Presentation - Ultra Portable Devices 24
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