Outline Motivation Front-end architecture and interference - PowerPoint PPT Presentation

A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection A. Bevilacqua, A. Gerosa and A. Neviani U NIVERSITY OF P ADOVA UWB for Sensor Network Workshop Lausanne – 4 November 2005 A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 1/17

Outline • Motivation • Front-end architecture and interference rejection concept • Circuit design • Measurement results A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 2/17

Introduction • UWB is 7.5 GHz of unlicenced spectrum for: – High data-rate comm. → wireless USB – Low data-rate comm. → sensor networks • Broadband sets new design challenges • We developed a UWB receiver front-end: – Tailored for high data-rate MB-OFDM – Focused on low-power, low-cost technology and interference rejection • Results show general UWB receiver feasibility A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 3/17

Front-end architecture LO I LO Buffer O/P Buffer LNA OUT I RF IN OUT Q O/P Buffer Notch Filter LO Buffer LO Q • Direct conversion for higher integration A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 4/17

UWB spectrum WLAN bands Group #1 Group #2 Group #3 Group #4 Group #5 3960� 10296 3432 4488 5016 5544 6072 6600 7128 7656 8184 8712 9240 9768 f [MHz] • Severe WLAN interference in 4.9–5.825 GHz range – Use of that range for UWB is prevented – Either operate on a small portion of the spectrum, e.g. “Group #1” only – Or broadband system with interference filtering A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 5/17

Interference rejection Several possible approaches: • Off-chip prefilter – Increases cost and losses in the signal path • Highly linear front-end – Stringent circuit level specs • Wideband integrated filter – Trade-off btw. roll-off and filter complexity • Tunable integrated notch filter – Needs automatic tuning A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 6/17

Integrated tunable notch filter Basic idea: • Front-end linearity is limited by the largest interferer • Suppress the largest blocker by just 10 dB ⇒ strongly improve linearity performance • WLAN band is fragmented ⇒ the spectrum where the largest fraction the interference is concentrated can be notched out – Automatic tuning circuit not addressed in this work – Solutions already reported in the literature A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 7/17

LNA design V cc V cc R L R c L L C c Q 3 V cas C c Q 2 Z in V out L C 1 L b 1 V in Q 1 notch filter L 2 C 2 L e V bias • LC-ladder input network to noise/power match A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 8/17

Notch filter design LNA V cc V en M 1 L 3 Q 2 Q 4 C 3 Q 1 C 4 C var V tune Notch I notch Filter • Current is steered away from signal path at notch frequency A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 9/17

Mixer design V cc V cc I bias,mix V cc R m R m C m C m V o,mix Q 9 Q 10 Q 6 Q 7 LO port Q 8 Q 5 R 2 R 3 L 4 R d R 1 C 5 RF in • Single-balanced mixer with modified bias network A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 10/17

Chip microphotograph • 0 . 35 µm SiGe BiCMOS technology • Die area is 2 . 1 × 1 . 7 mm 2 including pads A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 11/17

Input match 10 0 −10 S 11 [dB] −20 On wafer At board connector −30 −40 2 4 6 8 10 12 Frequency [GHz] • Q PAD < 10 for f > 3 . 8 GHz impairs the input match • On wafer meas. show that input net. works properly A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 12/17

Conversion gain 22 20 18 G [dB] 16 14 12 10 8 3 5 7 9 11 Frequency [GHz] • Peak conversion gain is 21 . 5 dB • − 3 dB bandwidth is 3 . 1 – 8 GHz A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 13/17

DSB noise figure 16 14 12 NF DSB [dB] 10 8 6 4 4 6 8 10 12 Frequency [GHz] • Noise figure is less than 6.6 dB for f < 7 . 4 GHz A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 14/17

Notch filter operation 5.8 −5 −6 5.7 −7 5.6 A max [dBc] −8 5.5 f N [GHz] −9 5.4 −10 5.3 −11 5.2 −12 5.1 −13 5 0.8 0.8 1 1 1.2 1.2 1.4 1.4 V tune [V] • Notch filter tuning range covers the entire WLAN band A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 15/17

Cross-band gain desensitization −10 Notch Filter ON −15 P −1dB,CB [dBm] Notch Filter OFF −20 −25 −30 4 6 8 10 9 Frequency [GHz] x 10 • Notch filter improves P − 1 dB , CB by as much as 9.8 dB A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 16/17

Summary of performance Maximum gain [dB] 21.5 Bandwidth [GHz] 3.1–8 Minimum NF DSB 4.8 I & Q matching [dB] 0.5 − 11 . 3 ⋄ † , > − 4 . 7 † , > − 6 . 5 † P − 1dB , CB , IIP 3 #3 , IIP 3 #7 [dBm] > − 22 , > 29 . 2 ∗ , > − 14 . 6 ICP , IIP 2 IB , IIP 3 IB [dBm] 49 . 2 from V CC = 1 . 8 V Power consumption [mW] Die area [mm 2 ] 2 . 1 × 1 . 7 ⋄ at 3.5 GHz † notch filter on ∗ simulation result A 0 . 35 µm SiGe BiCMOS Ultrawideband Receiver Front-End with Integrated Interference Rejection – p. 17/17