OpenMPL : An Open Source Layout Decomposer Wei Li 1 , Yuzhe Ma 1 , Qi Sun 1 , Yibo Lin 2 , Iris Hui-Ru Jiang 3 , Bei Yu 1 , David Z. Pan 4 1 The Chinese University of Hong Kong, 2 Peking University, 3 National Taiwan University, 4 University of Texas at Austin 1 / 21
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10,000,000,000 Core i7 Core 2 Duo 1,000,000,000 Number of Transistors Pentium 4 per Integrated Circuit Intel Microprocessors 100,000,000 Pentium II 10,000,000 486 Pentium 386 1,000,000 Invention of the 286 100,000 Transistor 8086 Doubles every 2.1 yrs 4004 10,000 1,000 100 10 1 1940 1950 1960 1970 1980 1990 2000 2010 2020 Year 2 / 21
Transistors Patterning Interconnect Complexity [Courtesy ARM] Planar CMOS LE AI / Cu / W wires 2005 2010 2015 2020 2025 2 / 21
Transistors Patterning Interconnect Complexity [Courtesy ARM] LELE FinFET W LI Planar CMOS LE 10 nm 7 nm 5 nm 3 nm AI / Cu / W wires 2005 2010 2015 2020 2025 2 / 21
Opto Connect eNVM EUV DSA Transistors EUV LELE CNT 3D IC VNW Graphene Patterning SAQP EUV EBL Interconnect SADP HNW Complexity LELELE [Courtesy ARM] LELE EUV FinFET W LI Cu Doping Planar CMOS LE 10 nm 7 nm 5 nm 3 nm AI / Cu / W wires 2005 2010 2015 2020 2025 2 / 21
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